wehub-resource-sync
84 lines
3.0 KiB
Plaintext
84 lines
3.0 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/prelu_kernel.h"
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#include "glog/logging.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/elementwise_base.h"
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#include "paddle/phi/kernels/funcs/index_impl.cu.h"
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#include "paddle/phi/kernels/gpu/prelu_funcs.h"
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namespace phi {
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template <typename T, typename Context>
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void PReluKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& alpha,
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const std::string& data_format,
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const std::string& mode,
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DenseTensor* out) {
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dev_ctx.template Alloc<T>(out);
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if (out && out->numel() == 0) {
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return;
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}
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const T* x_ptr = x.data<T>();
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const T* alpha_ptr = alpha.data<T>();
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int64_t numel = x.numel();
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auto dim = x.dims();
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auto x_rank = dim.size();
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VLOG(4) << "dim[0]:" << dim[0] << ", dim[1]:" << dim[1] << ", dim["
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<< x_rank - 1 << "]:" << dim[x_rank - 1] << ", numel:" << numel
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<< ", mode:" << mode << ", format:" << data_format;
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if (mode == "channel") {
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bool channel_last = data_format == "NHWC";
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size_t channel = channel_last ? dim[x_rank - 1] : dim[1];
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if (channel_last) {
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auto func = PReluChannelLastWiseCUDAFunctor<T>(x_ptr, alpha_ptr, channel);
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IndexKernel<T, PReluChannelLastWiseCUDAFunctor<T>>(dev_ctx, out, func);
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} else {
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size_t plane_size = numel / dim[0] / channel;
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auto func = PReluChannelFirstWiseCUDAFunctor<T>(
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x_ptr, alpha_ptr, numel, channel, plane_size);
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IndexKernel<T, PReluChannelFirstWiseCUDAFunctor<T>>(dev_ctx, out, func);
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}
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} else if (mode == "element") {
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size_t spatial_size = numel / dim[0];
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auto func =
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PreluElementWiseDirectCUDAFunctor<T>(x_ptr, alpha_ptr, spatial_size);
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IndexKernel<T, PreluElementWiseDirectCUDAFunctor<T>>(dev_ctx, out, func);
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} else {
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std::vector<const DenseTensor*> ins = {&x};
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std::vector<DenseTensor*> outs = {out};
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auto func = PreluScalarDirectCUDAFunctor<T>(alpha_ptr);
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funcs::ElementwiseKernel<T>(dev_ctx, ins, &outs, func);
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(prelu,
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GPU,
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ALL_LAYOUT,
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phi::PReluKernel,
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float,
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phi::float16,
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phi::bfloat16,
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double) {}
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