wehub-resource-sync
117 lines
3.8 KiB
Plaintext
117 lines
3.8 KiB
Plaintext
// Copyright (c) 2024 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <string>
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#include "paddle/phi/backends/gpu/gpu_info.h"
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#include "paddle/phi/backends/gpu/gpu_primitives.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/blas/blas.h"
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#include "paddle/phi/kernels/funcs/eigen/common.h"
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namespace phi {
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const int CUDA_NUM_THREADS = 1024;
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static inline int GET_BLOCKS(const int N) {
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return (N + CUDA_NUM_THREADS - 1) / CUDA_NUM_THREADS;
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}
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template <typename T>
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__global__ void add_bias_kernel(
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T* data, int slot_pairs_num, int ins_num, int out_dim, const T* bias) {
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CUDA_KERNEL_LOOP(idx, slot_pairs_num * ins_num * out_dim) {
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int block_len = ins_num * out_dim;
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int slot_index = idx / block_len;
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int out_dim_index = (idx % block_len) % out_dim;
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T temp = data[idx] + bias[slot_index * out_dim + out_dim_index];
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data[idx] = temp;
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}
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}
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template <typename T>
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void add_bias(gpuStream_t stream,
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T* data,
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int slot_pairs_num,
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int ins_num,
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int out_dim,
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const T* bias) {
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add_bias_kernel<<<GET_BLOCKS(slot_pairs_num * ins_num * out_dim),
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CUDA_NUM_THREADS,
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0,
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stream>>>(data, slot_pairs_num, ins_num, out_dim, bias);
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}
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template <typename T, typename Context>
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void BatchFCCUDAKernel(const Context& dev_ctx,
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const DenseTensor& input_in,
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const DenseTensor& w_in,
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const DenseTensor& bias_in,
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DenseTensor* out) {
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// X.dim = slot_pairs_num * ins_num * in_dim
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// W.dim = slot_pairs_num * in_dim * out_dim
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// b.dim = slot_pairs_num * out_dim
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// output.dim = slot_pairs_num * ins_num * out_dim
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auto* input = &input_in;
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auto* w = &w_in;
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auto* bias = &bias_in;
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auto* output = out;
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auto input_dims = input->dims();
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auto w_dims = w->dims();
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auto slot_pairs_num = input_dims[0];
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auto ins_num = input_dims[1];
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auto in_dim = input_dims[2];
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auto out_dim = w_dims[2];
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// get data ptr
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const T* in_data = input->data<T>();
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const T* w_data = w->data<T>();
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const T* bias_data = bias->data<T>();
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output->Resize({slot_pairs_num, ins_num, out_dim});
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T* out_data = dev_ctx.template Alloc<T>(output);
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// initialize
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auto out_eigen = EigenVector<T>::Flatten(*output);
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auto& place = *dev_ctx.eigen_device();
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out_eigen.device(place) = out_eigen.constant(static_cast<T>(0));
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CBLAS_TRANSPOSE transA = CblasNoTrans;
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CBLAS_TRANSPOSE transB = CblasNoTrans;
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T alpha = 1;
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T beta = 0;
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int64_t strideA = ins_num * in_dim;
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int64_t strideB = in_dim * out_dim;
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auto blas = funcs::GetBlas<GPUContext, T>(dev_ctx);
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blas.BatchedGEMM(transA,
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transB,
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ins_num,
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out_dim,
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in_dim,
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alpha,
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in_data,
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w_data,
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beta,
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out_data,
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slot_pairs_num,
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strideA,
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strideB);
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add_bias<T>(
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dev_ctx.stream(), out_data, slot_pairs_num, ins_num, out_dim, bias_data);
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}
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} // namespace phi
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PD_REGISTER_KERNEL(
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batch_fc, GPU, ALL_LAYOUT, phi::BatchFCCUDAKernel, float, double) {}
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