234 lines
8.3 KiB
Plaintext
234 lines
8.3 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/triangular_solve_kernel.h"
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#include "paddle/common/ddim.h"
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#include "paddle/phi/backends/gpu/cuda/cuda_graph_with_memory_pool.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/common/memory_utils.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/empty_kernel.h"
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#include "paddle/phi/kernels/expand_kernel.h"
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#include "paddle/phi/kernels/funcs/blas/blas.h"
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#include "paddle/phi/kernels/funcs/common_shape.h"
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namespace phi {
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template <typename T, typename Context>
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void TriangularSolveKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& y,
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bool upper,
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bool transpose,
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bool unitriangular,
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DenseTensor* out) {
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if (x.numel() == 0 || y.numel() == 0) {
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dev_ctx.template Alloc<T>(out);
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return;
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}
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// get broadcast dim
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std::vector<int64_t> x_bst_dims_vec;
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std::vector<int64_t> y_bst_dims_vec;
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std::tie(x_bst_dims_vec, y_bst_dims_vec) =
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funcs::MatrixGetBroadcastDims(x, y);
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int x_bst_ndim = x_bst_dims_vec.size();
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int y_bst_ndim = y_bst_dims_vec.size();
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// Tensor broadcast to 'out' and temp 'x_bst'
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IntArray x_bst_dims(x_bst_dims_vec);
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DenseTensor x_bst = Empty<T, Context>(dev_ctx, x_bst_dims);
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const T* x_bst_data = x_bst.data<T>();
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ExpandKernel<T, Context>(dev_ctx, x, x_bst_dims, &x_bst);
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out->Resize(y_bst_dims_vec);
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T* out_data = dev_ctx.template Alloc<T>(out);
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IntArray y_bst_dims(y_bst_dims_vec);
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ExpandKernel<T, Context>(dev_ctx, y, y_bst_dims, out);
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// calculate use cublas library
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CBLAS_UPLO uplo = upper ? CblasUpper : CblasLower;
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CBLAS_TRANSPOSE transA = transpose ? CblasTrans : CblasNoTrans;
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CBLAS_DIAG diag = unitriangular ? CblasUnit : CblasNonUnit;
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int M = static_cast<int>(y_bst_dims_vec[y_bst_ndim - 2]);
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int N = static_cast<int>(y_bst_dims_vec[y_bst_ndim - 1]);
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int lda = std::max(1, M);
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int ldb = std::max(1, N);
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int64_t batch_size = 1;
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for (int64_t i = 0; i < x_bst_ndim - 2; i++) {
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batch_size *= x_bst_dims_vec[i];
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}
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auto blas = funcs::GetBlas<GPUContext, T>(dev_ctx);
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if (batch_size <= 8 && M >= 64) {
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for (int64_t i = 0; i < batch_size; i++) {
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blas.TRSM(CblasLeft,
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uplo,
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transA,
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diag,
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M,
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N,
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T(1),
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x_bst_data + i * M * M,
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lda,
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out_data + i * N * M,
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ldb);
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}
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} else {
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bool use_chunking_workaround = false;
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// Workaround the following a bug on CUDA < 12.1
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// RuntimeError: CUDA error: CUBLAS_STATUS_EXECUTION_FAILED when calling
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// `cublasStrsmBatched
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#if (defined(PADDLE_WITH_CUDA) || defined(PADDLE_WITH_HIP)) && \
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defined(CUSOLVER_VERSION) && (CUSOLVER_VERSION < 12100)
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if (N > 524280) {
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use_chunking_workaround = true;
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}
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#endif
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if (use_chunking_workaround) {
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constexpr int64_t max_n_size = 524280;
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int64_t n_chunks = (N + max_n_size - 1) / max_n_size;
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std::vector<const T*> cpu_a_ptrs(batch_size);
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for (int64_t i = 0; i < batch_size; ++i) {
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cpu_a_ptrs[i] = x_bst_data + i * M * M;
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}
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Allocator::AllocationPtr gpu_a_ptrs_data = memory_utils::Alloc(
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dev_ctx.GetPlace(),
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cpu_a_ptrs.size() * sizeof(T*),
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phi::Stream(reinterpret_cast<phi::StreamId>(dev_ctx.stream())));
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size_t nbytes_a_ptrs = cpu_a_ptrs.size() * sizeof(T*);
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const void* stable_a_ptrs =
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backends::gpu::RestoreHostMemIfCapturingCUDAGraph(
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reinterpret_cast<uint8_t*>(const_cast<T**>(cpu_a_ptrs.data())),
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nbytes_a_ptrs);
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memory_utils::Copy(dev_ctx.GetPlace(),
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gpu_a_ptrs_data->ptr(),
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CPUPlace(),
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stable_a_ptrs,
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nbytes_a_ptrs,
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dev_ctx.stream());
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const T** gpu_a_ptrs =
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reinterpret_cast<const T**>(gpu_a_ptrs_data->ptr());
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Allocator::AllocationPtr gpu_b_ptrs_data = memory_utils::Alloc(
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dev_ctx.GetPlace(),
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batch_size * sizeof(T*),
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Stream(reinterpret_cast<StreamId>(dev_ctx.stream())));
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T** gpu_b_ptrs = reinterpret_cast<T**>(gpu_b_ptrs_data->ptr());
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for (int64_t i = 0; i < n_chunks; ++i) {
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int64_t n_offset = i * max_n_size;
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int current_n =
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static_cast<int>(std::min((int64_t)N - n_offset, max_n_size));
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std::vector<T*> cpu_b_ptrs_for_chunk(batch_size);
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for (int64_t j = 0; j < batch_size; ++j) {
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cpu_b_ptrs_for_chunk[j] = out_data + j * M * N + n_offset;
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}
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size_t nbytes_b_ptrs = cpu_b_ptrs_for_chunk.size() * sizeof(T*);
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const void* stable_b_ptrs =
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backends::gpu::RestoreHostMemIfCapturingCUDAGraph(
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reinterpret_cast<uint8_t*>(cpu_b_ptrs_for_chunk.data()),
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nbytes_b_ptrs);
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memory_utils::Copy(dev_ctx.GetPlace(),
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gpu_b_ptrs_data->ptr(),
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CPUPlace(),
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stable_b_ptrs,
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nbytes_b_ptrs,
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dev_ctx.stream());
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blas.BatchedTRSM(CblasLeft,
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uplo,
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transA,
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diag,
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M,
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current_n,
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static_cast<T>(1.0),
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gpu_a_ptrs,
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lda,
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gpu_b_ptrs,
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ldb,
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batch_size);
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}
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} else {
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std::vector<const T*> cpu_ptrs(batch_size * 2);
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for (int64_t i = 0; i < batch_size; ++i) {
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cpu_ptrs[i] = x_bst_data + i * M * M;
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cpu_ptrs[i + batch_size] = out_data + i * M * N;
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}
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Allocator::AllocationPtr tmp_gpu_ptrs_data = memory_utils::Alloc(
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dev_ctx.GetPlace(),
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cpu_ptrs.size() * sizeof(T*),
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Stream(reinterpret_cast<StreamId>(dev_ctx.stream())));
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size_t nbytes_ptrs = cpu_ptrs.size() * sizeof(T*);
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const void* stable_ptrs =
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backends::gpu::RestoreHostMemIfCapturingCUDAGraph(
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reinterpret_cast<uint8_t*>(const_cast<T**>(cpu_ptrs.data())),
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nbytes_ptrs);
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memory_utils::Copy(dev_ctx.GetPlace(),
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tmp_gpu_ptrs_data->ptr(),
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CPUPlace(),
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stable_ptrs,
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nbytes_ptrs,
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dev_ctx.stream());
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const T** gpu_a_ptrs =
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reinterpret_cast<const T**>(tmp_gpu_ptrs_data->ptr());
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T** gpu_b_ptrs =
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reinterpret_cast<T**>(tmp_gpu_ptrs_data->ptr()) + batch_size;
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blas.BatchedTRSM(CblasLeft,
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uplo,
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transA,
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diag,
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M,
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N,
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static_cast<T>(1.0),
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gpu_a_ptrs,
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lda,
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gpu_b_ptrs,
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ldb,
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batch_size);
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}
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}
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}
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} // namespace phi
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#ifdef PADDLE_WITH_CUDA
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PD_REGISTER_KERNEL(triangular_solve,
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GPU,
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ALL_LAYOUT,
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phi::TriangularSolveKernel,
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float,
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double,
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phi::complex64,
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phi::complex128) {}
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#else // PADDLE_WITH_HIP
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// blas_impl.hip.h not support CUBlas<T>::TRSM for complex
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PD_REGISTER_KERNEL(triangular_solve,
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GPU,
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ALL_LAYOUT,
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phi::TriangularSolveKernel,
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float,
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double) {}
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#endif
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