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2026-07-13 12:40:42 +08:00

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// Copyright (c) 2023 PaddlePaddle Authors. All Rights Reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "paddle/phi/kernels/prelu_grad_kernel.h"
#include "paddle/phi/backends/xpu/enforce_xpu.h"
#include "paddle/phi/core/kernel_registry.h"
#include "paddle/phi/kernels/full_kernel.h"
namespace phi {
template <typename T, typename Context>
void PReluGradKernel(const Context& dev_ctx,
const DenseTensor& x,
const DenseTensor& alpha,
const DenseTensor& out_grad,
const std::string& data_format,
const std::string& mode,
DenseTensor* x_grad,
DenseTensor* alpha_grad) {
using XPUType = typename XPUTypeTrait<T>::Type;
if (x_grad->numel() == 0) {
dev_ctx.template Alloc<T>(x_grad);
if (alpha_grad) {
Full<T, Context>(dev_ctx, alpha_grad->dims(), 0, alpha_grad);
}
}
if (x.numel() == 0) return;
const T* x_ptr = x.data<T>();
const T* alpha_ptr = alpha.data<T>();
const T* out_grad_ptr = out_grad.data<T>();
T* x_grad_ptr = dev_ctx.template Alloc<T>(x_grad);
T* alpha_grad_ptr = dev_ctx.template Alloc<T>(alpha_grad);
auto x_dim = x.dims();
auto x_rank = x_dim.size();
std::vector<int64_t> x_shape(x_rank);
if (x_rank == 0) {
x_shape = std::vector<int64_t>({1});
} else {
x_shape = vectorize<int64_t>(x_dim);
}
// mode = 0: channel_nchw, xshape = {n, c, h, w}, alpha_shape = {c}
// mode = 1, channel_nhwc, xshape = {n, h, w, c}, alpha_shape = {c}
// mode = 2, elementwise, deprecated in Paddle 2.x
// mode = 3, alpha_shape = {} or {1}
int xpu_mode = 0;
if (mode == "channel") {
if (data_format == "NCHW") {
xpu_mode = 0;
if (x_rank == 2) { // special case for NC shape, use channel last mode
xpu_mode = 1;
}
} else { // NHWC, channel last
xpu_mode = 1;
}
} else if (mode == "element") {
xpu_mode = 2;
} else if (mode == "all") {
xpu_mode = 3;
} else {
PADDLE_THROW(common::errors::InvalidArgument(
"Expected mode of prelu kernel is 'channel' or 'all', But got "
"unsupported mode: %s.",
mode));
}
int r = xpu::prelu_grad(dev_ctx.x_context(),
reinterpret_cast<const XPUType*>(x_ptr),
reinterpret_cast<const XPUType*>(alpha_ptr),
reinterpret_cast<const XPUType*>(out_grad_ptr),
reinterpret_cast<XPUType*>(x_grad_ptr),
reinterpret_cast<XPUType*>(alpha_grad_ptr),
x_shape,
xpu_mode);
PADDLE_ENFORCE_XDNN_SUCCESS(r, "prelu_grad");
}
} // namespace phi
PD_REGISTER_KERNEL(
prelu_grad, XPU, ALL_LAYOUT, phi::PReluGradKernel, float, phi::float16) {}