96 lines
3.3 KiB
C++
96 lines
3.3 KiB
C++
// Copyright (c) 2023 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/prelu_grad_kernel.h"
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#include "paddle/phi/backends/xpu/enforce_xpu.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/full_kernel.h"
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namespace phi {
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template <typename T, typename Context>
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void PReluGradKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& alpha,
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const DenseTensor& out_grad,
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const std::string& data_format,
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const std::string& mode,
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DenseTensor* x_grad,
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DenseTensor* alpha_grad) {
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using XPUType = typename XPUTypeTrait<T>::Type;
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if (x_grad->numel() == 0) {
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dev_ctx.template Alloc<T>(x_grad);
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if (alpha_grad) {
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Full<T, Context>(dev_ctx, alpha_grad->dims(), 0, alpha_grad);
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}
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}
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if (x.numel() == 0) return;
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const T* x_ptr = x.data<T>();
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const T* alpha_ptr = alpha.data<T>();
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const T* out_grad_ptr = out_grad.data<T>();
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T* x_grad_ptr = dev_ctx.template Alloc<T>(x_grad);
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T* alpha_grad_ptr = dev_ctx.template Alloc<T>(alpha_grad);
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auto x_dim = x.dims();
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auto x_rank = x_dim.size();
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std::vector<int64_t> x_shape(x_rank);
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if (x_rank == 0) {
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x_shape = std::vector<int64_t>({1});
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} else {
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x_shape = vectorize<int64_t>(x_dim);
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}
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// mode = 0: channel_nchw, xshape = {n, c, h, w}, alpha_shape = {c}
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// mode = 1, channel_nhwc, xshape = {n, h, w, c}, alpha_shape = {c}
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// mode = 2, elementwise, deprecated in Paddle 2.x
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// mode = 3, alpha_shape = {} or {1}
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int xpu_mode = 0;
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if (mode == "channel") {
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if (data_format == "NCHW") {
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xpu_mode = 0;
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if (x_rank == 2) { // special case for NC shape, use channel last mode
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xpu_mode = 1;
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}
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} else { // NHWC, channel last
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xpu_mode = 1;
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}
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} else if (mode == "element") {
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xpu_mode = 2;
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} else if (mode == "all") {
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xpu_mode = 3;
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} else {
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PADDLE_THROW(common::errors::InvalidArgument(
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"Expected mode of prelu kernel is 'channel' or 'all', But got "
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"unsupported mode: %s.",
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mode));
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}
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int r = xpu::prelu_grad(dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(x_ptr),
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reinterpret_cast<const XPUType*>(alpha_ptr),
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reinterpret_cast<const XPUType*>(out_grad_ptr),
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reinterpret_cast<XPUType*>(x_grad_ptr),
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reinterpret_cast<XPUType*>(alpha_grad_ptr),
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x_shape,
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xpu_mode);
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "prelu_grad");
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}
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} // namespace phi
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PD_REGISTER_KERNEL(
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prelu_grad, XPU, ALL_LAYOUT, phi::PReluGradKernel, float, phi::float16) {}
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