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// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "paddle/phi/kernels/index_select_kernel.h"
#include "paddle/common/enforce.h"
#include "paddle/phi/backends/gpu/gpu_info.h"
#include "paddle/phi/backends/gpu/gpu_launch_config.h"
#include "paddle/phi/backends/gpu/gpu_primitives.h"
#include "paddle/phi/core/kernel_registry.h"
#include "paddle/phi/core/utils/data_type.h"
#include "paddle/phi/kernels/gpu/index_select_impl.h"
namespace phi {
template <typename T, typename Context>
void IndexSelectKernel(const Context& dev_ctx,
const DenseTensor& x,
const DenseTensor& index,
int dim,
DenseTensor* output) {
if (output && output->numel() == 0) {
dev_ctx.template Alloc<T>(output);
return;
}
auto input_dim = x.dims();
auto output_dim = output->dims();
dim = dim >= 0 ? dim : dim + input_dim.size();
auto stride_dim = common::stride(input_dim);
int64_t stride = stride_dim[dim];
int64_t size = output_dim[dim];
int64_t delta = input_dim[dim] - size;
int64_t dim_size = input_dim[dim];
const auto& index_type = index.dtype();
bool index_type_match =
index_type == DataType::INT64 || index_type == DataType::INT32;
PADDLE_ENFORCE_EQ(index_type_match,
true,
common::errors::InvalidArgument(
"Input(Index) holds the wrong type, it holds %s, but "
"desires to be %s or %s",
index_type,
DataType::INT32,
DataType::INT64));
auto* in_data = x.data<T>();
T* out_data = dev_ctx.template Alloc<T>(output);
int64_t numel = output->numel();
auto stream = dev_ctx.stream();
unsigned int block_dim = PADDLE_CUDA_NUM_THREADS;
const uint64_t grid_x = (numel + block_dim - 1) / block_dim;
PADDLE_ENFORCE_LE_UINT32_MAX(grid_x, "grid.x");
dim3 grid_dim = dim3(static_cast<uint32_t>(grid_x));
backends::gpu::LimitGridDim(dev_ctx, &grid_dim);
if (index_type == DataType::INT64) {
const int64_t* index_data = index.data<int64_t>();
index_select_cuda_kernel<T, int64_t><<<grid_dim, block_dim, 0, stream>>>(
in_data, out_data, index_data, numel, stride, size, delta, dim_size);
} else {
const int* index_data = index.data<int>();
index_select_cuda_kernel<T, int><<<grid_dim, block_dim, 0, stream>>>(
in_data, out_data, index_data, numel, stride, size, delta, dim_size);
}
}
} // namespace phi
PD_REGISTER_KERNEL(index_select,
GPU,
ALL_LAYOUT,
phi::IndexSelectKernel,
float,
double,
phi::float8_e4m3fn,
phi::float16,
phi::bfloat16,
phi::complex64,
phi::complex128,
int,
int64_t,
bool) {}