wehub-resource-sync
285 lines
9.8 KiB
Plaintext
285 lines
9.8 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/embedding_grad_kernel.h"
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#include "paddle/phi/kernels/funcs/embedding_grad.h"
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#include "glog/logging.h"
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#include "paddle/common/flags.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/backends/gpu/gpu_primitives.h"
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#include "paddle/phi/common/amp_type_traits.h"
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#include "paddle/phi/common/data_type.h"
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#include "paddle/phi/common/memory_utils.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/core/mixed_vector.h"
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#include "paddle/phi/kernels/funcs/eigen/common.h"
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#include "paddle/phi/kernels/funcs/embedding_util.h"
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COMMON_DECLARE_int64(embedding_deterministic);
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namespace phi {
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template <typename InT, typename OutT>
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__global__ void InputTypeConvert(const InT* in_ids,
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const int64_t K,
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OutT* out_ids) {
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for (int64_t i = 0; i < K; i++) {
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out_ids[i] = static_cast<OutT>(in_ids[i]);
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}
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}
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template <typename T, typename IdT>
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__global__ void EmbeddingGrad(T* table,
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const T* output,
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const IdT* ids,
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const int64_t N,
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const int64_t K,
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const int64_t D) {
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int idx = threadIdx.x;
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int64_t idy =
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static_cast<int64_t>(blockIdx.x) +
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static_cast<int64_t>(threadIdx.y) * static_cast<int64_t>(gridDim.x);
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while (idy < K) {
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auto id = static_cast<int64_t>(ids[idy]);
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const T* out = output + idy * D;
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T* tab = table + id * D;
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#ifdef PADDLE_WITH_CUDA
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VectorizedAtomicAddPerBlock(D, idx, blockDim.x, out, tab);
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#else
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for (int64_t i = idx; i < D; i += blockDim.x) {
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CudaAtomicAdd(&tab[i], out[i]);
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}
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#endif
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idy += blockDim.y * gridDim.x;
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}
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}
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template <typename T, typename Context>
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struct EmbeddingGradCUDAFunctor {
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EmbeddingGradCUDAFunctor(const Context& dev_ctx,
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const DenseTensor& input,
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const DenseTensor& weight,
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const DenseTensor& out_grad,
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int64_t padding_idx,
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DenseTensor* weight_grad)
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: dev_ctx_(dev_ctx),
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input_(input),
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weight_(weight),
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out_grad_(out_grad),
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padding_idx_(padding_idx),
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weight_grad_(weight_grad) {}
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template <typename IdT>
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void apply() {
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// Since paddings are not trainable and fixed in forward, the gradient of
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// paddings makes no sense and we don't deal with it in backward.
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{
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auto d_output_t = out_grad_;
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auto d_table_t = weight_grad_;
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size_t N = weight_grad_->dims()[0];
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size_t D = weight_grad_->dims()[1];
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size_t K = input_.numel();
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const T* d_output = d_output_t.template data<T>();
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const auto* ids = input_.template data<IdT>();
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T* d_table = dev_ctx_.template Alloc<T>(d_table_t);
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#ifdef PADDLE_WITH_HIP
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PADDLE_ENFORCE_GPU_SUCCESS(
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hipMemsetAsync(d_table, 0, N * D * sizeof(T), dev_ctx_.stream()));
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#else
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PADDLE_ENFORCE_GPU_SUCCESS(
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cudaMemsetAsync(d_table, 0, N * D * sizeof(T), dev_ctx_.stream()));
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#endif
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if (FLAGS_embedding_deterministic == 1) {
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funcs::LaunchEmbeddingGradDeterministicKernel<T, IdT>(
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dev_ctx_, ids, d_output, d_table, N, D, K);
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} else {
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const int gridx = 2 * dev_ctx_.GetSMCount();
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dim3 threads(128, 8);
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dim3 grids(gridx, 1);
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if (FLAGS_embedding_deterministic > 1) {
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VLOG(2) << "Run grad kernel of embedding with single thread.";
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grids.x = 1;
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threads.y = 1;
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}
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EmbeddingGrad<T, IdT><<<grids, threads, 0, dev_ctx_.stream()>>>(
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d_table, d_output, ids, N, K, D);
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}
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}
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}
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private:
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const GPUContext& dev_ctx_;
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const DenseTensor& input_;
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const DenseTensor& weight_;
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const DenseTensor& out_grad_;
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int64_t padding_idx_;
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DenseTensor* weight_grad_;
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};
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template <typename T, typename Context>
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void EmbeddingGradKernel(const Context& dev_ctx,
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const DenseTensor& input,
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const DenseTensor& weight,
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const DenseTensor& out_grad,
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int64_t padding_idx,
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DenseTensor* weight_grad) {
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EmbeddingGradCUDAFunctor<T, Context> functor(
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dev_ctx, input, weight, out_grad, padding_idx, weight_grad);
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if (input.dtype() == DataType::INT32) {
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functor.template apply<int>();
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} else if (input.dtype() == DataType::INT64) {
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functor.template apply<int64_t>();
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} else if (input.dtype() == DataType::INT16) {
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functor.template apply<int16_t>();
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} else {
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PADDLE_THROW(common::errors::Unimplemented(
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"embedding input only support int16, int32 and int64"));
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}
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}
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template <typename T, typename Context>
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struct EmbeddingSparseGradCUDAFunctor {
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EmbeddingSparseGradCUDAFunctor(const Context& dev_ctx,
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const DenseTensor& input,
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const DenseTensor& weight,
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const DenseTensor& out_grad,
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int64_t padding_idx,
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SelectedRows* weight_grad)
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: dev_ctx_(dev_ctx),
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input_(input),
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weight_(weight),
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out_grad_(out_grad),
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padding_idx_(padding_idx),
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weight_grad_(weight_grad) {}
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template <typename IdT>
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void apply() {
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// Since paddings are not trainable and fixed in forward, the gradient of
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// paddings makes no sense and we don't deal with it in backward.
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const auto* ids_data = input_.template data<IdT>();
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auto* d_table = weight_grad_;
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auto* table = &weight_;
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auto* d_output = &out_grad_;
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int64_t ids_num = input_.numel();
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dim3 threads(128, 8);
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dim3 grids(8, 1);
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auto stream = dev_ctx_.stream();
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Vector<int64_t> new_rows;
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new_rows.resize(ids_num);
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auto gpu_place = dev_ctx_.GetPlace();
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MixVector<int64_t> mixv_new_rows(&new_rows);
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if (!std::is_same<IdT, int64_t>::value) {
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InputTypeConvert<<<grids, threads, 0, stream>>>(
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ids_data, ids_num, mixv_new_rows.MutableData(gpu_place));
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} else {
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memory_utils::Copy(gpu_place,
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mixv_new_rows.CUDAMutableData(gpu_place),
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gpu_place,
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ids_data,
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ids_num * sizeof(int64_t),
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stream);
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}
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mixv_new_rows.CopyToCPU();
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d_table->set_rows(new_rows);
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auto* d_table_value = d_table->mutable_value();
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d_table_value->Resize({ids_num, table->dims()[1]});
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dev_ctx_.template Alloc<T>(d_table_value);
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auto* d_table_data = d_table_value->template data<T>();
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auto* d_output_data = d_output->template data<T>();
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auto d_output_dims = d_output->dims();
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auto d_output_dims_2d =
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common::flatten_to_2d(d_output_dims, d_output_dims.size() - 1);
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PADDLE_ENFORCE_EQ(d_table_value->dims(),
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d_output_dims_2d,
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common::errors::InvalidArgument(
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"ShapeError: The shape of lookup_table@Grad and "
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"output@Grad should be same. "
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"But received lookup_table@Grad's shape = [%s], "
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"output@Grad's shape = [%s].",
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d_table_value->dims(),
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d_output_dims_2d));
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memory_utils::Copy(gpu_place,
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d_table_data,
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gpu_place,
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d_output_data,
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d_output->numel() * sizeof(T),
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stream);
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}
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private:
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const GPUContext& dev_ctx_;
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const DenseTensor& input_;
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const DenseTensor& weight_;
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const DenseTensor& out_grad_;
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int64_t padding_idx_;
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SelectedRows* weight_grad_;
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};
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template <typename T, typename Context>
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void EmbeddingSparseGradKernel(const Context& dev_ctx,
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const DenseTensor& input,
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const DenseTensor& weight,
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const DenseTensor& out_grad,
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int64_t padding_idx,
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SelectedRows* weight_grad) {
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EmbeddingSparseGradCUDAFunctor<T, Context> functor(
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dev_ctx, input, weight, out_grad, padding_idx, weight_grad);
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if (input.dtype() == DataType::INT32) {
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functor.template apply<int>();
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} else if (input.dtype() == DataType::INT64) {
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functor.template apply<int64_t>();
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} else if (input.dtype() == DataType::INT16) {
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functor.template apply<int16_t>();
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PADDLE_THROW(common::errors::Unimplemented(
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"embedding input only support int16, int32 and int64"));
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(embedding_grad,
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GPU,
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ALL_LAYOUT,
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phi::EmbeddingGradKernel,
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float,
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double,
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phi::float16,
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phi::bfloat16,
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phi::complex64,
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phi::complex128) {}
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PD_REGISTER_KERNEL(embedding_sparse_grad,
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GPU,
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ALL_LAYOUT,
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phi::EmbeddingSparseGradKernel,
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float,
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double,
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phi::float16,
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phi::bfloat16,
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phi::complex64,
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phi::complex128) {}
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