chore: import upstream snapshot with attribution
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# SPDX-License-Identifier: Apache-2.0
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# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
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import torch
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from vllm.utils.torch_utils import direct_register_custom_op
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# MXFP8 constants
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MXFP8_VALUE_DTYPE = torch.float8_e4m3fn
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MXFP8_SCALE_DTYPE = torch.uint8
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MXFP8_BLOCK_SIZE = 32
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def swizzle_mxfp8_scale(sf: torch.Tensor, M: int, K: int) -> torch.Tensor:
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"""Swizzle MXFP8 scales from row-major 2D to F8_128x4 layout."""
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scaling_vector_size = MXFP8_BLOCK_SIZE # 32 for MXFP8
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factor = scaling_vector_size * 4 # 128
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num_m_tiles = (M + 127) // 128
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num_k_tiles = (K + factor - 1) // factor
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m_padded = num_m_tiles * 128
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k_scale_padded = num_k_tiles * 4
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scale_cols = K // scaling_vector_size
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sf_padded = torch.zeros(
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(m_padded, k_scale_padded), dtype=sf.dtype, device=sf.device
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)
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sf_padded[:M, :scale_cols] = sf
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sf_reshaped = sf_padded.view(num_m_tiles, 4, 32, num_k_tiles, 4)
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sf_swizzled = sf_reshaped.transpose(1, 3)
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return sf_swizzled.contiguous().view(-1)
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def _mxfp8_e4m3_quantize_torch(
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x: torch.Tensor,
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is_sf_swizzled_layout: bool = False,
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) -> tuple[torch.Tensor, torch.Tensor]:
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"""Naive MXFP8 quantization.
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For each block of 32 elements along the last dimension, compute a
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shared e8m0 scale (the biased exponent of the block-wise amax)
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and quantize each element to float8_e4m3fn.
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Returns (quantized_values [same shape, fp8], scales uint8).
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Scale shape depends on is_sf_swizzled_layout:
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False -> [..., K//32] (row-major 2D)
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True -> [flat swizzled 1D]
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"""
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assert x.shape[-1] % MXFP8_BLOCK_SIZE == 0
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orig_shape = x.shape
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num_blocks = x.shape[-1] // MXFP8_BLOCK_SIZE
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x_fp32 = x.to(torch.float32)
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x_blocked = x_fp32.view(*orig_shape[:-1], num_blocks, MXFP8_BLOCK_SIZE)
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amax = x_blocked.abs().amax(dim=-1)
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amax = amax.clamp(min=torch.finfo(torch.float32).tiny)
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scale_biased = torch.floor(torch.log2(amax)) + 127.0
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scale_biased = scale_biased.clamp(0, 254)
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scales_uint8 = scale_biased.to(torch.uint8)
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descale = torch.exp2(scale_biased - 127.0)
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x_scaled = x_blocked / descale.unsqueeze(-1)
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x_fp8 = x_scaled.view(orig_shape).to(MXFP8_VALUE_DTYPE)
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if x.ndim == 2:
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M, K = x.shape
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scales_uint8 = scales_uint8.view(M, -1)
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if is_sf_swizzled_layout:
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scales_uint8 = swizzle_mxfp8_scale(scales_uint8, M=M, K=K)
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elif x.ndim == 3:
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B, M, K = x.shape
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scales_uint8 = scales_uint8.view(B, M, -1)
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if is_sf_swizzled_layout:
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swizzled = []
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for i in range(B):
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swizzled.append(swizzle_mxfp8_scale(scales_uint8[i], M=M, K=K))
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scales_uint8 = torch.cat(swizzled)
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return x_fp8, scales_uint8
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def _mxfp8_quant_triton_kernel():
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"""Lazily-built Triton kernel: per-32-block E8M0 scale + FP8-E4M3 quant.
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Fuses what ``_mxfp8_e4m3_quantize_torch`` does in several elementwise passes
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into one launch. Each program handles ``[BLOCK_M, 32]`` (one MX block).
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"""
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from vllm.triton_utils import tl, triton
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@triton.jit
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def _kernel(
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x_ptr,
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xq_ptr,
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s_ptr,
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M,
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K,
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sxm,
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sxk,
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sqm,
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sqk,
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ssm,
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ssk,
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BLOCK_M: tl.constexpr,
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):
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pid_m = tl.program_id(0)
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pid_b = tl.program_id(1) # which 32-element block along K
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offs_m = pid_m * BLOCK_M + tl.arange(0, BLOCK_M)
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offs_k = pid_b * 32 + tl.arange(0, 32)
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m_mask = offs_m < M
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x = tl.load(
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x_ptr + offs_m[:, None] * sxm + offs_k[None, :] * sxk,
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mask=m_mask[:, None],
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other=0.0,
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).to(tl.float32)
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amax = tl.maximum(tl.max(tl.abs(x), axis=1), 1e-30) # [BLOCK_M]
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sb = tl.floor(tl.log2(amax)) + 127.0
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sb = tl.minimum(tl.maximum(sb, 0.0), 254.0)
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descale = tl.exp2(sb - 127.0)
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xq = (x / descale[:, None]).to(xq_ptr.dtype.element_ty)
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tl.store(
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xq_ptr + offs_m[:, None] * sqm + offs_k[None, :] * sqk,
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xq,
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mask=m_mask[:, None],
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)
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tl.store(s_ptr + offs_m * ssm + pid_b * ssk, sb.to(tl.uint8), mask=m_mask)
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return _kernel
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_MXFP8_QUANT_KERNEL = None
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def _mxfp8_e4m3_quantize_triton(
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x: torch.Tensor,
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) -> tuple[torch.Tensor, torch.Tensor]:
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"""Fused 2D MXFP8 quant (non-swizzled, row-major [M, K//32] scales)."""
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from vllm.triton_utils import triton
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global _MXFP8_QUANT_KERNEL
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if _MXFP8_QUANT_KERNEL is None:
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_MXFP8_QUANT_KERNEL = _mxfp8_quant_triton_kernel()
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M, K = x.shape
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x = x.contiguous()
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xq = torch.empty((M, K), dtype=MXFP8_VALUE_DTYPE, device=x.device)
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scales = torch.empty(
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(M, K // MXFP8_BLOCK_SIZE), dtype=MXFP8_SCALE_DTYPE, device=x.device
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)
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BLOCK_M = 64
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grid = (triton.cdiv(M, BLOCK_M), K // MXFP8_BLOCK_SIZE)
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_MXFP8_QUANT_KERNEL[grid](
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x,
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xq,
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scales,
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M,
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K,
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x.stride(0),
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x.stride(1),
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xq.stride(0),
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xq.stride(1),
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scales.stride(0),
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scales.stride(1),
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BLOCK_M=BLOCK_M,
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)
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return xq, scales
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def _mxfp8_e4m3_quantize_impl(
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x: torch.Tensor,
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is_sf_swizzled_layout: bool = False,
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alignment: int = 0,
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) -> tuple[torch.Tensor, torch.Tensor]:
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from vllm.platforms import current_platform
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if current_platform.has_device_capability(100):
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from flashinfer import mxfp8_quantize as flashinfer_mxfp8_quantize
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x_q, x_scales = flashinfer_mxfp8_quantize(
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x,
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is_sf_swizzled_layout=is_sf_swizzled_layout,
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alignment=alignment if alignment > 0 else 32,
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backend="cute-dsl",
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)
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if x_scales.ndim == 1 and x.ndim == 2 and not is_sf_swizzled_layout:
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x_scales = x_scales.view(x.size(0), -1)
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return x_q, x_scales
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# ROCm: a single fused Triton kernel beats the multi-pass torch path for the
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# common 2D, non-swizzled activation-quant case (used by the native MX
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# linear/MoE). Falls back to torch otherwise (3D weights, swizzled layout).
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if (
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current_platform.is_rocm()
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and not is_sf_swizzled_layout
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and x.ndim == 2
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and x.shape[-1] % MXFP8_BLOCK_SIZE == 0
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):
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return _mxfp8_e4m3_quantize_triton(x)
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return _mxfp8_e4m3_quantize_torch(x, is_sf_swizzled_layout)
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def mxfp8_e4m3_quantize(
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x: torch.Tensor,
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is_sf_swizzled_layout: bool = False,
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alignment: int = 0,
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) -> tuple[torch.Tensor, torch.Tensor]:
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return torch.ops.vllm.mxfp8_quantize(x, is_sf_swizzled_layout, alignment)
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def dequant_mxfp8_to_bf16(x: torch.Tensor, scales: torch.Tensor) -> torch.Tensor:
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"""Dequantize MXFP8 tensor to BF16."""
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x_float = x.to(torch.float32)
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num_blocks = x.shape[-1] // MXFP8_BLOCK_SIZE
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x_blocked = x_float.view(*x.shape[:-1], num_blocks, MXFP8_BLOCK_SIZE)
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descale = torch.exp2(scales.to(torch.float32) - 127.0)
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dequantized = x_blocked * descale.unsqueeze(-1)
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dequantized = dequantized.view(*x.shape)
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return dequantized.to(torch.bfloat16)
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def mxfp8_e4m3_quantize_fake(
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x: torch.Tensor,
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is_sf_swizzled_layout: bool = False,
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alignment: int = 0,
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) -> tuple[torch.Tensor, torch.Tensor]:
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"""Fake implementation for torch.compile tracing."""
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fp_data = torch.empty_like(x, dtype=MXFP8_VALUE_DTYPE)
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block_size = MXFP8_BLOCK_SIZE
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if x.ndim == 2:
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M, N = x.shape
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K = (N + block_size - 1) // block_size
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if is_sf_swizzled_layout:
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M_padded = ((M + 127) // 128) * 128
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K_padded = ((K + 3) // 4) * 4
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scales = torch.empty(
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M_padded * K_padded, dtype=MXFP8_SCALE_DTYPE, device=x.device
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)
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else:
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scales = torch.empty((M, K), dtype=MXFP8_SCALE_DTYPE, device=x.device)
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elif x.ndim == 3:
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B, M, N = x.shape
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K = (N + block_size - 1) // block_size
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if is_sf_swizzled_layout:
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M_padded = ((M + 127) // 128) * 128
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K_padded = ((K + 3) // 4) * 4
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scales = torch.empty(
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B * M_padded * K_padded, dtype=MXFP8_SCALE_DTYPE, device=x.device
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)
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else:
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scales = torch.empty((B, M, K), dtype=MXFP8_SCALE_DTYPE, device=x.device)
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else:
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scale_shape = list(x.shape)
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scale_shape[-1] = (x.shape[-1] + block_size - 1) // block_size
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scales = torch.empty(scale_shape, dtype=MXFP8_SCALE_DTYPE, device=x.device)
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return fp_data, scales
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direct_register_custom_op(
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op_name="mxfp8_quantize",
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op_func=_mxfp8_e4m3_quantize_impl,
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fake_impl=mxfp8_e4m3_quantize_fake,
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)
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def xpu_mxfp8_quantize(
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x: torch.Tensor, dtype: torch.dtype | None = None
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) -> tuple[torch.Tensor, torch.Tensor]:
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return torch.ops.vllm.xpu_mxfp8_quantize(x, dtype)
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