wehub-resource-sync
341 lines
14 KiB
C++
341 lines
14 KiB
C++
/* Copyright 2021 The TensorFlow Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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==============================================================================*/
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#include <cstdint>
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#include <initializer_list>
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#include <memory>
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#include <vector>
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#include <gmock/gmock.h>
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#include <gtest/gtest.h>
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#include "tensorflow/lite/c/common.h"
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#include "tensorflow/lite/kernels/kernel_util.h"
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#include "tensorflow/lite/kernels/test_util.h"
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#include "tensorflow/lite/schema/schema_generated.h"
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namespace tflite {
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namespace ops {
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namespace builtin {
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TfLiteRegistration* Register_CONV_3D_GENERIC_OPT();
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} // namespace builtin
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} // namespace ops
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namespace {
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using ::testing::ElementsAre;
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using ::testing::ElementsAreArray;
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class Conv3dOpModel : public SingleOpModel {
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public:
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Conv3dOpModel(const TensorData& input, const TensorData& filter,
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const TensorData& bias, const TensorData& output,
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Padding padding = Padding_VALID, int32_t stride_depth = 1,
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int32_t stride_width = 1, int32_t stride_height = 1,
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ActivationFunctionType activation = ActivationFunctionType_NONE,
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int32_t dilation_depth = 1, int32_t dilation_width = 1,
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int32_t dilation_height = 1) {
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input_ = AddInput(input);
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filter_ = AddInput(filter);
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bias_ = AddInput(bias);
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output_ = AddOutput(output);
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SetBuiltinOp(
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BuiltinOperator_CONV_3D, BuiltinOptions_Conv3DOptions,
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CreateConv3DOptions(builder_, padding, stride_depth, stride_width,
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stride_height, activation, dilation_depth,
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dilation_width, dilation_height)
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.Union());
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BuildInterpreter({GetShape(input_), GetShape(filter_), GetShape(bias_)});
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}
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Conv3dOpModel(const TensorData& input, const TensorData& filter,
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const TensorData& output, Padding padding = Padding_VALID,
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int32_t stride_depth = 1, int32_t stride_width = 1,
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int32_t stride_height = 1,
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ActivationFunctionType activation = ActivationFunctionType_NONE,
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int32_t dilation_depth = 1, int32_t dilation_width = 1,
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int32_t dilation_height = 1) {
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input_ = AddInput(input);
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filter_ = AddInput(filter);
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output_ = AddOutput(output);
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SetBuiltinOp(
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BuiltinOperator_CONV_3D, BuiltinOptions_Conv3DOptions,
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CreateConv3DOptions(builder_, padding, stride_depth, stride_width,
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stride_height, activation, dilation_depth,
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dilation_width, dilation_height)
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.Union());
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BuildInterpreter({GetShape(input_), GetShape(filter_)});
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}
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void SetFilter(std::vector<float> f) { PopulateTensor(filter_, f); }
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void SetBias(std::initializer_list<float> f) { PopulateTensor(bias_, f); }
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void SetInput(std::vector<float> data) { PopulateTensor(input_, data); }
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std::vector<float> GetOutput() { return ExtractVector<float>(output_); }
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std::vector<int> GetOutputShape() { return GetTensorShape(output_); }
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private:
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int input_;
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int filter_;
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int bias_;
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int output_;
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};
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class PrepareOnlyConv3dOpModel : public SingleOpModel {
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public:
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PrepareOnlyConv3dOpModel(
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const TensorData& input, const TensorData& filter,
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const TensorData& output, Padding padding = Padding_VALID,
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int32_t stride_depth = 1, int32_t stride_width = 1,
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int32_t stride_height = 1,
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ActivationFunctionType activation = ActivationFunctionType_NONE,
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int32_t dilation_depth = 1, int32_t dilation_width = 1,
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int32_t dilation_height = 1) {
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input_ = AddInput(input);
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filter_ = AddInput(filter);
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output_ = AddOutput(output);
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SetBuiltinOp(
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BuiltinOperator_CONV_3D, BuiltinOptions_Conv3DOptions,
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CreateConv3DOptions(builder_, padding, stride_depth, stride_width,
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stride_height, activation, dilation_depth,
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dilation_width, dilation_height)
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.Union());
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resolver_ = std::make_unique<SingleOpResolver>(
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BuiltinOperator_CONV_3D, ops::builtin::Register_CONV_3D_GENERIC_OPT());
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BuildInterpreter({GetShape(input_), GetShape(filter_)},
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/*num_threads=*/1, /*allow_fp32_relax_to_fp16=*/false,
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/*apply_delegate=*/false,
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/*allocate_and_delegate=*/false);
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}
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private:
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int input_;
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int filter_;
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int output_;
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};
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template <typename T>
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std::vector<T> CreateRangeVector(int N) {
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std::vector<T> result;
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for (int i = 0; i < N; ++i) result.push_back(i);
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return result;
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}
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TEST(Conv3dOpModel, InvalidInputDimsTest) {
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EXPECT_DEATH_IF_SUPPORTED(Conv3dOpModel m({TensorType_FLOAT32, {2, 2, 4, 1}},
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{TensorType_FLOAT32, {3, 2, 2, 1}},
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{TensorType_FLOAT32, {}}),
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"input->dims->size != 5");
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}
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TEST(Conv3dOpModel, InvalidFilterDimsTest) {
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EXPECT_DEATH_IF_SUPPORTED(
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Conv3dOpModel m({TensorType_FLOAT32, {1, 2, 2, 4, 1}},
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{TensorType_FLOAT32, {3, 2, 2, 1}},
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{TensorType_FLOAT32, {}}),
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"filter->dims->size != 5");
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}
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TEST(Conv3dOpModel, MismatchChannelSizeTest) {
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EXPECT_DEATH_IF_SUPPORTED(
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Conv3dOpModel m({TensorType_FLOAT32, {1, 2, 2, 4, 1}},
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{TensorType_FLOAT32, {1, 3, 2, 2, 2}},
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{TensorType_FLOAT32, {}}),
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"input->dims->data.4. != filter->dims->data.3.");
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}
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TEST(Conv3dOpModel, MismatchBiasSizeTest) {
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EXPECT_DEATH_IF_SUPPORTED(
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Conv3dOpModel m({TensorType_FLOAT32, {1, 2, 2, 4, 2}},
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{TensorType_FLOAT32, {1, 3, 2, 2, 1}},
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{TensorType_FLOAT32, {2}}, {TensorType_FLOAT32, {}}),
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"NumElements.bias. != SizeOfDimension.filter, 4.");
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}
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TEST(Conv3dPrepareSecurityTest, RejectsIm2ColDepthOverflow) {
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if (sizeof(void*) <= 4) {
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GTEST_SKIP() << "Interpreter construction overflows before kernel Prepare "
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"on 32-bit.";
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}
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constexpr int kHugeDim = 46341;
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PrepareOnlyConv3dOpModel m(
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{TensorType_FLOAT32, {1, 1, 1, 1, kHugeDim}},
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{TensorType_FLOAT32, {kHugeDim, 1, 1, kHugeDim, 1}},
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{TensorType_FLOAT32, {}}, Padding_SAME);
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// On non-mobile platforms, need_im2col is always true, so the overflow is
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// detected and the allocation is rejected, resulting in kTfLiteError.
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// On mobile platforms, it goes to a fallback execution path that does not
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// require im2col, thus does not overflow and returns kTfLiteOk.
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if (IsMobilePlatform()) {
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EXPECT_EQ(m.AllocateTensors(), kTfLiteOk);
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} else {
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EXPECT_EQ(m.AllocateTensors(), kTfLiteError);
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}
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}
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TEST(Conv3dOpModel, SimpleFloat32Test) {
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Conv3dOpModel m({TensorType_FLOAT32, {1, 2, 2, 4, 2}},
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{TensorType_FLOAT32, {2, 2, 2, 2, 2}},
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{TensorType_FLOAT32, {}});
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m.SetInput(CreateRangeVector<float>(32));
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m.SetFilter({-1, -1, -1, -1, -1, 1, -1, 1, -1, 1, 1, 1, 1, 1, -1, -1,
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1, -1, 1, 1, 1, 1, -1, 1, -1, -1, -1, 1, 1, -1, 1, -1});
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ASSERT_EQ(m.Invoke(), kTfLiteOk);
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 1, 1, 3, 2));
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EXPECT_THAT(m.GetOutput(), ElementsAreArray({30, 6, 26, 10, 22, 14}));
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}
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TEST(Conv3dOpModel, PaddingValidTest) {
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Conv3dOpModel m({TensorType_FLOAT32, {1, 3, 4, 5, 2}},
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{TensorType_FLOAT32, {2, 2, 2, 2, 2}},
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{TensorType_FLOAT32, {}});
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m.SetInput(CreateRangeVector<float>(120));
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m.SetFilter({-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1, 1, 1, -1, -1,
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1, 1, -1, 1, -1, 1, -1, 1, -1, -1, -1, 1, -1, 1, 1, 1});
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ASSERT_EQ(m.Invoke(), kTfLiteOk);
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 2, 3, 4, 2));
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EXPECT_THAT(
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m.GetOutput(),
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ElementsAreArray({-214, 266, -234, 270, -254, 274, -274, 278, -314, 286,
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-334, 290, -354, 294, -374, 298, -414, 306, -434, 310,
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-454, 314, -474, 318, -614, 346, -634, 350, -654, 354,
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-674, 358, -714, 366, -734, 370, -754, 374, -774, 378,
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-814, 386, -834, 390, -854, 394, -874, 398}));
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}
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TEST(Conv3dOpModel, PaddingSameTest) {
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Conv3dOpModel m({TensorType_FLOAT32, {1, 3, 4, 5, 2}},
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{TensorType_FLOAT32, {2, 2, 2, 2, 2}},
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{TensorType_FLOAT32, {}}, Padding_SAME);
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m.SetInput(CreateRangeVector<float>(120));
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m.SetFilter({1, -1, 1, -1, 1, -1, -1, 1, 1, -1, -1, 1, 1, -1, -1, 1,
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-1, 1, -1, 1, -1, -1, -1, 1, 1, 1, 1, 1, -1, 1, -1, 1});
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ASSERT_EQ(m.Invoke(), kTfLiteOk);
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 3, 4, 5, 2));
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EXPECT_THAT(
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m.GetOutput(),
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ElementsAreArray(
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{-172, 290, -176, 298, -180, 306, -184, 314, 36, 198, -192,
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330, -196, 338, -200, 346, -204, 354, 56, 218, -212, 370,
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-216, 378, -220, 386, -224, 394, 76, 238, -226, 82, -230,
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82, -234, 82, -238, 82, -80, 80, -252, 450, -256, 458,
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-260, 466, -264, 474, 116, 278, -272, 490, -276, 498, -280,
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506, -284, 514, 136, 298, -292, 530, -296, 538, -300, 546,
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-304, 554, 156, 318, -306, 82, -310, 82, -314, 82, -318,
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82, -80, 80, 158, -158, 162, -162, 166, -166, 170, -170,
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176, -176, 178, -178, 182, -182, 186, -186, 190, -190, 196,
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-196, 198, -198, 202, -202, 206, -206, 210, -210, 216, -216,
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220, -220, 224, -224, 228, -228, 232, -232, 237, -237}));
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}
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TEST(Conv3dOpModel, StrideTest) {
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Conv3dOpModel m({TensorType_FLOAT32, {2, 2, 3, 4, 2}},
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{TensorType_FLOAT32, {2, 2, 2, 2, 2}},
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{TensorType_FLOAT32, {}}, Padding_VALID, /*stride_depth=*/2,
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/*stride_width=*/2, /*stride_height=*/2);
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m.SetInput(CreateRangeVector<float>(96));
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m.SetFilter({1, -1, 1, 1, -1, 1, 1, -1, 1, -1, -1, -1, -1, 1, 1, 1,
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1, -1, 1, 1, -1, 1, 1, -1, 1, -1, -1, -1, -1, 1, 1, 1});
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ASSERT_EQ(m.Invoke(), kTfLiteOk);
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(2, 1, 1, 2, 2));
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EXPECT_THAT(m.GetOutput(), ElementsAreArray({52, 8, 68, 8, 244, 8, 260, 8}));
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}
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TEST(Conv3dOpModel, StrideAndPaddingSameTest) {
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Conv3dOpModel m({TensorType_FLOAT32, {2, 2, 3, 4, 2}},
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{TensorType_FLOAT32, {2, 2, 2, 2, 2}},
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{TensorType_FLOAT32, {}}, Padding_SAME, /*stride_depth=*/2,
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/*stride_width=*/2, /*stride_height=*/2);
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m.SetInput(CreateRangeVector<float>(96));
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m.SetFilter({-1, 1, -1, 1, 1, 1, 1, 1, -1, 1, -1, -1, -1, 1, 1, 1,
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1, 1, -1, -1, -1, -1, -1, -1, 1, 1, 1, -1, -1, -1, -1, 1});
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ASSERT_EQ(m.Invoke(), kTfLiteOk);
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(2, 1, 2, 2, 2));
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EXPECT_THAT(m.GetOutput(),
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ElementsAreArray({-70, -28, -86, -12, -82, -16, -90, -8, -262,
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164, -278, 180, -178, 80, -186, 88}));
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}
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TEST(Conv3dOpModel, DilationTest) {
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Conv3dOpModel m({TensorType_FLOAT32, {2, 2, 3, 4, 2}},
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{TensorType_FLOAT32, {2, 2, 2, 2, 2}},
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{TensorType_FLOAT32, {}}, Padding_VALID, /*stride_depth=*/1,
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/*stride_width=*/1, /*stride_height=*/1,
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/*activation=*/ActivationFunctionType_NONE,
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/*dilation_depth=*/1, /*dilation_width=*/1,
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/*dilation_height=*/2);
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m.SetInput(CreateRangeVector<float>(96));
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m.SetFilter(CreateRangeVector<float>(32));
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ASSERT_EQ(m.Invoke(), kTfLiteOk);
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(2, 1, 1, 3, 2));
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EXPECT_THAT(m.GetOutput(),
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ElementsAreArray({7248, 7592, 7728, 8104, 8208, 8616, 18768,
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19880, 19248, 20392, 19728, 20904}));
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}
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TEST(Conv3dOpModel, BiasTest) {
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Conv3dOpModel m({TensorType_FLOAT32, {2, 2, 3, 4, 2}},
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{TensorType_FLOAT32, {2, 2, 2, 2, 2}},
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{TensorType_FLOAT32, {2}}, {TensorType_FLOAT32, {}},
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Padding_VALID, /*stride_depth=*/2,
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/*stride_width=*/2, /*stride_height=*/2);
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m.SetInput(CreateRangeVector<float>(96));
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m.SetFilter({1, -1, 1, 1, -1, 1, 1, -1, 1, -1, -1, -1, -1, 1, 1, 1,
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1, -1, 1, 1, -1, 1, 1, -1, 1, -1, -1, -1, -1, 1, 1, 1});
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m.SetBias({1, 2});
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ASSERT_EQ(m.Invoke(), kTfLiteOk);
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(2, 1, 1, 2, 2));
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EXPECT_THAT(m.GetOutput(),
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ElementsAreArray({53, 10, 69, 10, 245, 10, 261, 10}));
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}
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TEST(Conv3dOpModel, NoIm2ColTensorTest) {
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Conv3dOpModel m({TensorType_FLOAT32, {1, 2, 2, 2, 4}},
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{TensorType_FLOAT32, {1, 1, 1, 4, 4}},
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{TensorType_FLOAT32, {}}, Padding_VALID);
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m.SetInput(CreateRangeVector<float>(32));
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m.SetFilter(CreateRangeVector<float>(16));
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ASSERT_EQ(m.Invoke(), kTfLiteOk);
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EXPECT_THAT(m.GetOutputShape(), ElementsAre(1, 2, 2, 2, 4));
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EXPECT_THAT(
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m.GetOutput(),
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ElementsAreArray({56, 62, 68, 74, 152, 174, 196, 218, 248, 286, 324,
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362, 344, 398, 452, 506, 440, 510, 580, 650, 536, 622,
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708, 794, 632, 734, 836, 938, 728, 846, 964, 1082}));
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}
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} // namespace
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} // namespace tflite
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