--- title: "Quantization" metatags: description: "SGLang quantization: FP8, FP4, AWQ, GPTQ, ModelOpt, torchao. Offline and online quantization methods for efficient LLM inference." --- SGLang supports various quantization methods, including offline quantization and online dynamic quantization. Offline quantization loads pre-quantized model weights directly during inference. This is required for quantization methods such as GPTQ and AWQ, which collect and pre-compute various statistics from the original weights using the calibration dataset. Online quantization dynamically computes scaling parameters—such as the maximum/minimum values of model weights—during runtime. Like NVIDIA FP8 training's [delayed scaling](https://docs.nvidia.com/deeplearning/transformer-engine/user-guide/examples/fp8_primer.html#Mixed-precision-training-with-FP8) mechanism, online quantization calculates the appropriate scaling factors on-the-fly to convert high-precision weights into a lower-precision format. **Note: For better performance, usability and convenience, offline quantization is recommended over online quantization.** If you use a pre-quantized model, **do not add `--quantization` to enable online quantization at the same time**. For popular pre-quantized models, please visit [Unsloth](https://huggingface.co/unsloth), [NVIDIA ModelOpt](https://huggingface.co/collections/nvidia/inference-optimized-checkpoints-with-model-optimizer) or [NeuralMagic](https://huggingface.co/collections/neuralmagic) collections on HF for some popular quality validated quantized models. Quantized models must be validated via benchmarks post-quantization to guard against abnormal quantization loss regressions. ## Platform Compatibility The following table summarizes quantization method support across NVIDIA and AMD GPUs, Ascend NPUs.
| Method | NVIDIA GPUs | AMD GPUs (MI300X/MI325X/MI350X) | Ascend NPUs (A2/A3/A5) | Notes |
|---|---|---|---|---|
fp8 |
Yes | Yes | WIP | Aiter or Triton backend on AMD |
mxfp4 |
Yes | Yes | WIP | Requires CDNA3/CDNA4 with MXFP support; uses Aiter |
mxfp8 |
No | No | Yes (A5 for Diffusion and LLM Dense Linear) | Ascend NPU only; online MXFP8 quantization for Diffusion models (e.g., Wan2.2) and LLM Dense Linear on A5 series; uses CANN npu_dynamic_mx_quant / npu_quant_matmul kernels |
mxfp_w4a8 |
No | No | Yes (A5) | Ascend NPU only; online W4A8 for Qwen3 dense LLM (MXFP4 weights + MXFP8 activations) on A5 series; offline W4A8_MXFP checkpoints are auto-detected via modelslim |
blockwise_int8 |
Yes | Yes | No | Triton-based, works on both platforms |
w8a8_int8 |
Yes | Yes | No | |
w8a8_fp8 |
Yes | Yes | No | Aiter or Triton FP8 on AMD |
awq |
Yes | Yes | Yes | Uses Triton dequantize on AMD (vs. optimized CUDA kernels on NVIDIA). Uses CANN kernels on Ascend |
gptq |
Yes | Yes | Yes | Uses Triton or vLLM kernels on AMD. Uses CANN kernels on Ascend |
compressed-tensors |
Yes | Yes | Partial | Aiter paths for FP8/MoE on AMD. Uses CANN kernels on Ascend, FP8 not supported yet |
quark |
Yes | Yes | No | AMD Quark quantization; Aiter GEMM paths on AMD |
auto-round |
Yes | Yes | Partial | Platform-agnostic (Intel auto-round). Uses CANN kernels on Ascend |
quark_int4fp8_moe |
No | Yes | No | AMD-only; online INT4-to-FP8 MoE quantization (CDNA3/CDNA4) |
awq_marlin |
Yes | No | No | Marlin kernels are CUDA-only |
gptq_marlin |
Yes | No | No | Marlin kernels are CUDA-only |
gguf |
Yes | No | Yes | CUDA kernels in sgl-kernel; Ascend uses CPU pre-dequantization at load time |
modelopt / modelopt_fp8 |
Yes (Hopper/SM90+) | No | No | NVIDIA ModelOpt; requires NVIDIA hardware |
modelopt_fp4 |
Yes (SM80-SM90 via Marlin; SM100+ native FP4) | No | No | NVIDIA ModelOpt; use Marlin W4A16 fallback on Ampere/Hopper and native FP4 backends on Blackwell |
nvfp4_online |
Yes (Blackwell/SM100 or SM103) | No | No | Online MoE-only NVFP4 weight quantization with runtime per-token activation scaling for BF16/FP16/FP8 checkpoints; requires flashinfer_trtllm or flashinfer_trtllm_routed |
petit_nvfp4 |
No | Yes (MI250/MI300X/MI325X) | No | Enables NVFP4 on ROCm via Petit; use modelopt_fp4 on NVIDIA Blackwell. Auto-selected when loading NVFP4 models on AMD. See LMSYS blog and AMD ROCm blog. |
bitsandbytes |
Yes | Experimental | No | Depends on bitsandbytes ROCm support |
torchao (int4wo, etc.) |
Yes | Partial | No | int4wo not supported on AMD; other methods may work |
modelslim |
No | No | Yes | Ascend quantization; Uses CANN kernels |
| Backend | Hardware | Description |
|---|---|---|
auto |
All | Auto-selects based on hardware |
deep_gemm |
SM90, SM100 | JIT-compiled; enabled when DeepGEMM is installed |
flashinfer_trtllm |
SM100 | FlashInfer TensorRT-LLM backend; optimal for low-latency |
flashinfer_cutlass |
SM100/120 | FlashInfer CUTLASS groupwise FP8 GEMM |
flashinfer_deepgemm |
SM90 | Uses swapAB optimization for small M dimensions in decoding |
cutlass |
SM90, SM100/120 | sgl-kernel CUTLASS |
triton |
All | Fallback; widely compatible |
aiter |
ROCm | AMD AITER backend |
| Backend | Hardware | Description |
|---|---|---|
auto |
SM80+ | Auto-selects: flashinfer_cutedsl on SM100; marlin on SM80-SM90; flashinfer_cutlass otherwise (including SM120) |
cutlass |
SM100/120 | SGLang CUTLASS kernel |
flashinfer_cutlass |
SM100/120 | FlashInfer CUTLASS backend |
flashinfer_cudnn |
SM100/120 (CUDA 13+, cuDNN 9.15+) | FlashInfer cuDNN backend |
flashinfer_cutedsl |
SM100 | FlashInfer CuTe DSL backend |
flashinfer_trtllm |
SM100 | FlashInfer TensorRT-LLM backend |
marlin |
SM80-SM90 | Weight-only W4A16 fallback for NVFP4 checkpoints |