wehub-resource-sync
539 lines
20 KiB
C++
539 lines
20 KiB
C++
/* Copyright (c) 2021 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include <random>
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#include <vector>
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#include "gtest/gtest.h"
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#include "paddle/fluid/framework/op_registry.h"
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#include "paddle/fluid/framework/operator.h"
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#include "paddle/fluid/framework/program_desc.h"
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#include "paddle/fluid/framework/tensor_util.h"
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#include "paddle/phi/common/float16.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/math_function.h"
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#include "paddle/phi/kernels/fusion/gpu/cudnn_norm_conv.cu.h"
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namespace framework = paddle::framework;
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namespace platform = paddle::platform;
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USE_OP_ITSELF(conv2d);
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USE_OP_ITSELF(conv2d_grad);
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PD_DECLARE_KERNEL(conv2d, GPUDNN, ALL_LAYOUT);
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PD_DECLARE_KERNEL(conv2d_grad, GPUDNN, ALL_LAYOUT);
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template <typename T>
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void InitRandomTensor(const std::vector<int64_t> &dims,
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phi::DenseTensor *cpu_out) {
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T *cpu_out_ptr =
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cpu_out->mutable_data<T>(common::make_ddim(dims), phi::CPUPlace());
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std::default_random_engine random(0);
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std::uniform_real_distribution<float> dis(0.0, 1.0);
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for (int i = 0; i < cpu_out->numel(); ++i) {
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cpu_out_ptr[i] = static_cast<T>(dis(random));
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}
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}
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template <typename T>
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void TransposeNchwToNhwc(const phi::DenseTensor &cpu_in,
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phi::DenseTensor *cpu_out) {
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const auto &in_dims = cpu_in.dims();
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EXPECT_EQ(cpu_in.dims().size(), 4);
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const T *cpu_in_ptr = cpu_in.data<T>();
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T *cpu_out_ptr = cpu_out->mutable_data<T>(
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{in_dims[0], in_dims[2], in_dims[3], in_dims[1]}, phi::CPUPlace());
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int64_t n = in_dims[0];
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int64_t c = in_dims[1];
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int64_t hw = in_dims[2] * in_dims[3];
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for (int i = 0; i < n; ++i) {
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for (int j = 0; j < hw; ++j) {
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for (int k = 0; k < c; ++k) {
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int dst_idx = i * hw * c + j * c + k; // NOLINT
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int src_idx = i * c * hw + k * hw + j; // NOLINT
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cpu_out_ptr[dst_idx] = cpu_in_ptr[src_idx];
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}
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}
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}
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}
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template <typename T>
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void CheckOutput(const phi::DenseTensor &cpu_res,
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const phi::DenseTensor &cpu_base,
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float diff,
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bool is_relative_atol = false) {
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EXPECT_EQ(cpu_res.dims(), cpu_base.dims());
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const T *cpu_res_ptr = cpu_res.data<T>();
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const T *cpu_base_ptr = cpu_base.data<T>();
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for (int i = 0; i < cpu_res.numel(); ++i) {
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if (is_relative_atol) {
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EXPECT_LT(static_cast<float>(std::abs((cpu_res_ptr[i] - cpu_base_ptr[i]) /
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cpu_base_ptr[i])),
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diff);
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} else {
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EXPECT_LT(static_cast<float>(std::abs(cpu_res_ptr[i] - cpu_base_ptr[i])),
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diff);
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}
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}
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}
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// Use Paddle conv2d op results as baseline
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void ComputeConv2DForward(const phi::GPUContext &ctx,
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const phi::DenseTensor &cpu_input,
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const phi::DenseTensor &cpu_filter,
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phi::DenseTensor *cpu_output,
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int stride,
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int padding) {
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framework::Scope scope;
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auto *input = scope.Var("Input")->GetMutable<phi::DenseTensor>();
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auto *filter = scope.Var("Filter")->GetMutable<phi::DenseTensor>();
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auto *output = scope.Var("Output")->GetMutable<phi::DenseTensor>();
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auto place = ctx.GetPlace();
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paddle::framework::TensorCopySync(cpu_input, place, input);
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paddle::framework::TensorCopySync(cpu_filter, place, filter);
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framework::AttributeMap attrs;
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bool use_cudnn = true;
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std::string data_format = "NHWC";
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std::vector<int> strides = {stride, stride};
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std::vector<int> paddings = {padding, padding};
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attrs.insert({"strides", strides});
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attrs.insert({"paddings", paddings});
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attrs.insert({"use_cudnn", use_cudnn});
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attrs.insert({"data_format", data_format});
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auto op = framework::OpRegistry::CreateOp(
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"conv2d",
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{{"Input", {"Input"}}, {"Filter", {"Filter"}}},
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{{"Output", {"Output"}}},
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attrs);
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op->Run(scope, ctx.GetPlace());
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paddle::framework::TensorCopySync(*output, phi::CPUPlace(), cpu_output);
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}
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// Use Paddle conv2d_grad op results as baseline
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void ComputeConv2DBackward(const phi::GPUContext &ctx,
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const phi::DenseTensor &cpu_input,
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const phi::DenseTensor &cpu_filter,
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const phi::DenseTensor &cpu_output_grad,
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phi::DenseTensor *cpu_input_grad,
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phi::DenseTensor *cpu_filter_grad,
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int stride,
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int padding,
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int dilation) {
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framework::Scope scope;
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auto *input = scope.Var("Input")->GetMutable<phi::DenseTensor>();
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auto *filter = scope.Var("Filter")->GetMutable<phi::DenseTensor>();
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auto *output_grad = scope.Var("Output@GRAD")->GetMutable<phi::DenseTensor>();
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auto *input_grad = scope.Var("Input@GRAD")->GetMutable<phi::DenseTensor>();
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auto *filter_grad = scope.Var("Filter@GRAD")->GetMutable<phi::DenseTensor>();
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auto place = ctx.GetPlace();
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paddle::framework::TensorCopySync(cpu_input, place, input);
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paddle::framework::TensorCopySync(cpu_filter, place, filter);
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paddle::framework::TensorCopySync(cpu_output_grad, place, output_grad);
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framework::AttributeMap attrs;
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bool use_cudnn = true;
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std::string data_format = "NHWC";
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std::string padding_algorithm = "EXPLICIT";
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std::vector<int> strides = {stride, stride};
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std::vector<int> paddings = {padding, padding};
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std::vector<int> dilations = {dilation, dilation};
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int groups = 1;
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bool exhaustive_search = false;
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bool use_addto = false;
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attrs.insert({"use_cudnn", use_cudnn});
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attrs.insert({"data_format", data_format});
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attrs.insert({"padding_algorithm", padding_algorithm});
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attrs.insert({"strides", strides});
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attrs.insert({"paddings", paddings});
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attrs.insert({"dilations", dilations});
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attrs.insert({"groups", groups});
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attrs.insert({"exhaustive_search", exhaustive_search});
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attrs.insert({"use_addto", use_addto});
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attrs.insert({"workspace_size_MB", 512});
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auto op = framework::OpRegistry::CreateOp(
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"conv2d_grad",
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{{"Input", {"Input"}},
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{"Filter", {"Filter"}},
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{"Output@GRAD", {"Output@GRAD"}}},
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{{"Input@GRAD", {"Input@GRAD"}}, {"Filter@GRAD", {"Filter@GRAD"}}},
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attrs);
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op->Run(scope, ctx.GetPlace());
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paddle::framework::TensorCopySync(
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*input_grad, phi::CPUPlace(), cpu_input_grad);
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paddle::framework::TensorCopySync(
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*filter_grad, phi::CPUPlace(), cpu_filter_grad);
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}
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template <typename T>
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void ComputeSumAndSquareSum(const phi::DenseTensor &cpu_out,
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phi::DenseTensor *cpu_sum,
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phi::DenseTensor *cpu_sum_of_square) {
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const auto &dims = cpu_out.dims();
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int64_t c = dims[3];
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const T *cpu_out_ptr = cpu_out.data<T>();
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float *cpu_sum_ptr =
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cpu_sum->mutable_data<float>({1, 1, 1, c}, phi::CPUPlace());
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float *cpu_sum_square_ptr =
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cpu_sum_of_square->mutable_data<float>({1, 1, 1, c}, phi::CPUPlace());
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for (int j = 0; j < c; ++j) {
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float tmp_sum = 0.0f;
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float tmp_sum_of_squares = 0.0f;
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for (int i = 0; i < cpu_out.numel() / c; ++i) {
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float tmp_out = static_cast<float>(cpu_out_ptr[i * c + j]);
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tmp_sum += tmp_out;
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tmp_sum_of_squares += tmp_out * tmp_out;
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}
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cpu_sum_ptr[j] = tmp_sum;
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cpu_sum_square_ptr[j] = tmp_sum_of_squares;
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}
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}
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template <typename T>
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class CudnnNormConvolutionTester {
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public:
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CudnnNormConvolutionTester(int batch_size,
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int height,
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int width,
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int input_channels,
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int output_channels,
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int kernel_size,
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int stride) {
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batch_size_ = batch_size;
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height_ = height;
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width_ = width;
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input_channels_ = input_channels;
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output_channels_ = output_channels;
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kernel_size_ = kernel_size;
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stride_ = stride;
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padding_ = (kernel_size_ - 1) / 2;
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out_height_ = (height_ + 2 * padding_ - kernel_size_) / stride_ + 1;
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out_width_ = (width_ + 2 * padding_ - kernel_size_) / stride_ + 1;
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SetUp();
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}
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~CudnnNormConvolutionTester() = default;
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void CheckForward(float diff, bool is_relative_atol = false) {
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phi::GPUContext *ctx = static_cast<phi::GPUContext *>(
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phi::DeviceContextPool::Instance().Get(phi::GPUPlace(0)));
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phi::DenseTensor cpu_output_base;
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phi::DenseTensor cpu_sum_base;
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phi::DenseTensor cpu_sum_of_square_base;
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BaselineForward(
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*ctx, &cpu_output_base, &cpu_sum_base, &cpu_sum_of_square_base);
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phi::DenseTensor cpu_output;
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phi::DenseTensor cpu_sum;
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phi::DenseTensor cpu_sum_of_square;
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FusedForward(*ctx, &cpu_output, &cpu_sum, &cpu_sum_of_square);
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// Check forward correctness between baseline and results of normconv.
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CheckOutput<T>(cpu_output, cpu_output_base, diff, is_relative_atol);
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CheckOutput<float>(cpu_sum, cpu_sum_base, diff, is_relative_atol);
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CheckOutput<float>(
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cpu_sum_of_square, cpu_sum_of_square_base, diff, is_relative_atol);
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}
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void CheckBackward(float diff, bool is_relative_atol = false) {
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phi::GPUContext *ctx = static_cast<phi::GPUContext *>(
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phi::DeviceContextPool::Instance().Get(phi::GPUPlace(0)));
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phi::DenseTensor cpu_input_grad_base;
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phi::DenseTensor cpu_filter_nchw_grad_base;
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phi::DenseTensor cpu_filter_nhwc_grad_base;
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BaselineBackward(*ctx, &cpu_input_grad_base, &cpu_filter_nchw_grad_base);
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TransposeNchwToNhwc<T>(cpu_filter_nchw_grad_base,
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&cpu_filter_nhwc_grad_base);
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phi::DenseTensor cpu_input_grad;
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phi::DenseTensor cpu_filter_nhwc_grad;
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FusedBackward(*ctx, &cpu_input_grad, &cpu_filter_nhwc_grad);
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// Check backward correctness between baseline and results of normconv.
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CheckOutput<T>(cpu_input_grad, cpu_input_grad_base, diff, is_relative_atol);
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CheckOutput<T>(cpu_filter_nhwc_grad,
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cpu_filter_nhwc_grad_base,
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diff,
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is_relative_atol);
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}
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private:
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void SetUp() {
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InitRandomTensor<T>({batch_size_, height_, width_, input_channels_},
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&cpu_input_);
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InitRandomTensor<T>(
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{output_channels_, input_channels_, kernel_size_, kernel_size_},
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&cpu_filter_nchw_);
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// transpoes for filter, NCHW -> NHWC
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TransposeNchwToNhwc<T>(cpu_filter_nchw_, &cpu_filter_nhwc_);
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InitRandomTensor<T>(
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{batch_size_, out_height_, out_width_, output_channels_},
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&cpu_output_grad_);
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}
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void BaselineForward(const phi::GPUContext &ctx,
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phi::DenseTensor *cpu_output_base,
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phi::DenseTensor *cpu_sum_base,
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phi::DenseTensor *cpu_sum_of_square_base) {
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ComputeConv2DForward(
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ctx, cpu_input_, cpu_filter_nchw_, cpu_output_base, stride_, padding_);
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ComputeSumAndSquareSum<T>(
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*cpu_output_base, cpu_sum_base, cpu_sum_of_square_base);
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}
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void BaselineBackward(const phi::GPUContext &ctx,
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phi::DenseTensor *cpu_input_grad_base,
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phi::DenseTensor *cpu_filter_grad_base) {
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ComputeConv2DBackward(ctx,
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cpu_input_,
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cpu_filter_nchw_,
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cpu_output_grad_,
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cpu_input_grad_base,
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cpu_filter_grad_base,
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stride_,
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padding_,
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dilation_);
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}
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// get forward results of cudnn_norm_conv
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void FusedForward(const phi::GPUContext &ctx,
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phi::DenseTensor *cpu_output,
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phi::DenseTensor *cpu_sum,
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phi::DenseTensor *cpu_sum_of_square) {
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phi::DenseTensor input;
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phi::DenseTensor filter_nhwc;
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phi::DenseTensor output;
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phi::DenseTensor sum;
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phi::DenseTensor sum_of_square;
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auto place = ctx.GetPlace();
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paddle::framework::TensorCopySync(cpu_input_, place, &input);
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paddle::framework::TensorCopySync(cpu_filter_nhwc_, place, &filter_nhwc);
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output.Resize(common::make_ddim(
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{batch_size_, out_height_, out_width_, output_channels_}));
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sum.Resize(common::make_ddim({1, 1, 1, output_channels_}));
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sum_of_square.Resize(common::make_ddim({1, 1, 1, output_channels_}));
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auto input_shape = common::vectorize<int>(input.dims());
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auto filter_shape = common::vectorize<int>(filter_nhwc.dims());
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auto output_shape = common::vectorize<int>(output.dims());
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phi::fusion::CudnnNormConvolution<T> conv_op(ctx,
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input_shape,
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filter_shape,
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output_shape,
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padding_,
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stride_,
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dilation_,
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group_);
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conv_op.Forward(ctx, input, filter_nhwc, &output, &sum, &sum_of_square);
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paddle::framework::TensorCopySync(output, phi::CPUPlace(), cpu_output);
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paddle::framework::TensorCopySync(sum, phi::CPUPlace(), cpu_sum);
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paddle::framework::TensorCopySync(
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sum_of_square, phi::CPUPlace(), cpu_sum_of_square);
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}
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void FusedBackward(const phi::GPUContext &ctx,
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phi::DenseTensor *cpu_input_grad,
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phi::DenseTensor *cpu_filter_grad) {
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phi::DenseTensor input;
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phi::DenseTensor filter_nhwc;
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phi::DenseTensor output_grad;
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phi::DenseTensor input_grad;
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phi::DenseTensor filter_grad;
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auto place = ctx.GetPlace();
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paddle::framework::TensorCopySync(cpu_input_, place, &input);
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paddle::framework::TensorCopySync(cpu_filter_nhwc_, place, &filter_nhwc);
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paddle::framework::TensorCopySync(cpu_output_grad_, place, &output_grad);
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input_grad.Resize(input.dims());
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filter_grad.Resize(filter_nhwc.dims());
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auto input_shape = common::vectorize<int>(input.dims());
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auto filter_shape = common::vectorize<int>(filter_nhwc.dims());
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auto output_shape = common::vectorize<int>(output_grad.dims());
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phi::fusion::CudnnNormConvolutionGrad<T> conv_grad_op(ctx,
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input_shape,
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filter_shape,
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output_shape,
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padding_,
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stride_,
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dilation_,
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group_);
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conv_grad_op.Backward(
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ctx, input, filter_nhwc, output_grad, &input_grad, &filter_grad);
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paddle::framework::TensorCopySync(
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input_grad, phi::CPUPlace(), cpu_input_grad);
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paddle::framework::TensorCopySync(
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filter_grad, phi::CPUPlace(), cpu_filter_grad);
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}
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private:
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int batch_size_;
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int height_;
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int width_;
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int out_height_;
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int out_width_;
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int input_channels_;
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int output_channels_;
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int kernel_size_;
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int stride_;
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int padding_;
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const int dilation_ = 1;
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const int group_ = 1;
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// Forward input
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phi::DenseTensor cpu_input_;
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phi::DenseTensor cpu_filter_nchw_;
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phi::DenseTensor cpu_filter_nhwc_;
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// Backward input
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phi::DenseTensor cpu_output_grad_;
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};
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// test for fp16, kernel = 1, output_channels = input_channels
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TEST(CudnnNormConvFp16, K1S1) {
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int batch_size = 4;
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int height = 56;
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int width = 56;
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int input_channels = 32;
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int output_channels = 32;
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int kernel_size = 1;
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int stride = 1;
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CudnnNormConvolutionTester<phi::dtype::float16> test(batch_size,
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height,
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width,
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input_channels,
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output_channels,
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kernel_size,
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stride);
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phi::GPUContext *ctx = static_cast<phi::GPUContext *>(
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phi::DeviceContextPool::Instance().Get(phi::GPUPlace(0)));
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if (ctx->GetComputeCapability() < 70 || ctx->GetComputeCapability() >= 90) {
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ASSERT_THROW(test.CheckForward(1e-3, true),
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paddle::platform::EnforceNotMet);
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ASSERT_THROW(test.CheckBackward(1e-3, true),
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paddle::platform::EnforceNotMet);
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} else {
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ASSERT_NO_THROW(test.CheckForward(1e-3, true));
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ASSERT_NO_THROW(test.CheckBackward(1e-3, true));
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}
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}
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// test for fp16, kernel = 3, output_channels = input_channels
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TEST(CudnnNormConvFp16, K3S1) {
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int batch_size = 4;
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|
int height = 56;
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|
int width = 56;
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|
int input_channels = 32;
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|
int output_channels = 32;
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|
int kernel_size = 3;
|
|
int stride = 1;
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|
CudnnNormConvolutionTester<phi::dtype::float16> test(batch_size,
|
|
height,
|
|
width,
|
|
input_channels,
|
|
output_channels,
|
|
kernel_size,
|
|
stride);
|
|
phi::GPUContext *ctx = static_cast<phi::GPUContext *>(
|
|
phi::DeviceContextPool::Instance().Get(phi::GPUPlace(0)));
|
|
|
|
if (ctx->GetComputeCapability() < 70 || ctx->GetComputeCapability() >= 90) {
|
|
ASSERT_THROW(test.CheckForward(1e-3, true),
|
|
paddle::platform::EnforceNotMet);
|
|
ASSERT_THROW(test.CheckBackward(1e-3, true),
|
|
paddle::platform::EnforceNotMet);
|
|
} else {
|
|
ASSERT_NO_THROW(test.CheckForward(1e-3, true));
|
|
ASSERT_NO_THROW(test.CheckBackward(1e-3, true));
|
|
}
|
|
}
|
|
|
|
// test for fp16, kernel = 1, output_channels = input_channels * 4
|
|
TEST(CudnnNormConvFp16, K1S1O4) {
|
|
int batch_size = 4;
|
|
int height = 56;
|
|
int width = 56;
|
|
int input_channels = 32;
|
|
int output_channels = 128;
|
|
int kernel_size = 1;
|
|
int stride = 1;
|
|
CudnnNormConvolutionTester<phi::dtype::float16> test(batch_size,
|
|
height,
|
|
width,
|
|
input_channels,
|
|
output_channels,
|
|
kernel_size,
|
|
stride);
|
|
phi::GPUContext *ctx = static_cast<phi::GPUContext *>(
|
|
phi::DeviceContextPool::Instance().Get(phi::GPUPlace(0)));
|
|
|
|
if (ctx->GetComputeCapability() < 70 || ctx->GetComputeCapability() >= 90) {
|
|
ASSERT_THROW(test.CheckForward(1e-3, true),
|
|
paddle::platform::EnforceNotMet);
|
|
ASSERT_THROW(test.CheckBackward(1e-3, true),
|
|
paddle::platform::EnforceNotMet);
|
|
} else {
|
|
ASSERT_NO_THROW(test.CheckForward(1e-3, true));
|
|
ASSERT_NO_THROW(test.CheckBackward(1e-3, true));
|
|
}
|
|
}
|
|
|
|
// test for fp16, kernel = 1, stride = 2, output_channels = input_channels * 4
|
|
TEST(CudnnNormConvFp16, K1S2O4) {
|
|
int batch_size = 4;
|
|
int height = 8;
|
|
int width = 8;
|
|
int input_channels = 32;
|
|
int output_channels = 128;
|
|
int kernel_size = 1;
|
|
int stride = 2;
|
|
CudnnNormConvolutionTester<phi::dtype::float16> test(batch_size,
|
|
height,
|
|
width,
|
|
input_channels,
|
|
output_channels,
|
|
kernel_size,
|
|
stride);
|
|
phi::GPUContext *ctx = static_cast<phi::GPUContext *>(
|
|
phi::DeviceContextPool::Instance().Get(phi::GPUPlace(0)));
|
|
|
|
if (ctx->GetComputeCapability() <= 70 || ctx->GetComputeCapability() >= 90) {
|
|
ASSERT_THROW(test.CheckForward(1e-3, true),
|
|
paddle::platform::EnforceNotMet);
|
|
ASSERT_THROW(test.CheckBackward(1e-3), paddle::platform::EnforceNotMet);
|
|
} else {
|
|
ASSERT_NO_THROW(test.CheckForward(1e-3, true));
|
|
ASSERT_NO_THROW(test.CheckBackward(1e-3));
|
|
}
|
|
}
|