wehub-resource-sync
409 lines
13 KiB
C++
409 lines
13 KiB
C++
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/pool_kernel.h"
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#include "paddle/common/macros.h"
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#include "paddle/phi/backends/xpu/enforce_xpu.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/full_kernel.h"
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#include "paddle/phi/kernels/funcs/pooling.h"
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namespace phi {
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template <typename T, typename Context>
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void Pool2dKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const IntArray& kernel_size_t,
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const std::vector<int64_t>& strides,
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const std::vector<int64_t>& paddings_t,
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bool ceil_mode,
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bool exclusive,
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const std::string& data_format,
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const std::string& pooling_type,
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bool global_pooling,
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bool adaptive,
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const std::string& padding_algorithm,
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DenseTensor* out) {
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if (x.numel() == 0) {
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if (pooling_type == "max") {
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Full<T, Context>(dev_ctx, out->dims(), 0, out);
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} else {
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Full<T, Context>(dev_ctx, out->dims(), NAN, out);
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}
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return;
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}
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using XPUType = typename XPUTypeTrait<T>::Type;
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std::vector<int64_t> kernel_size(kernel_size_t.GetData().begin(),
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kernel_size_t.GetData().end());
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std::vector<int64_t> paddings(paddings_t.begin(), paddings_t.end());
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PADDLE_ENFORCE_EQ(kernel_size.size(),
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2,
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common::errors::InvalidArgument(
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"The Pool2d XPU OP only support 2 dimension pooling!"));
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// old model's data_format maybe AnyLayout
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PADDLE_ENFORCE_NE(
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data_format,
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"NHWC",
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common::errors::InvalidArgument("The Pool2d XPU OP does not support "
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"data_format is 'NHWC', but received %s",
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data_format));
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if (global_pooling) {
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for (size_t i = 0; i < kernel_size.size(); ++i) {
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paddings[i] = 0;
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kernel_size[i] = x.dims()[i + 2];
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}
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}
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const int64_t n = x.dims()[0];
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const int64_t c = x.dims()[1];
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const int64_t in_h = x.dims()[2];
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const int64_t in_w = x.dims()[3];
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const int64_t out_h = out->dims()[2];
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const int64_t out_w = out->dims()[3];
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DDim data_dims;
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data_dims = slice_ddim(x.dims(), 2, x.dims().size());
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funcs::UpdatePadding(&paddings,
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global_pooling,
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adaptive,
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padding_algorithm,
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data_dims,
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strides,
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kernel_size);
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dev_ctx.template Alloc<T>(out);
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int* index_data = nullptr;
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int r = 0;
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if (!adaptive) {
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if (kernel_size[0] > (in_h + paddings[0] + paddings[1])) {
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kernel_size[0] = in_h + paddings[0] + paddings[1];
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}
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if (kernel_size[1] > (in_w + paddings[2] + paddings[3])) {
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kernel_size[1] = in_w + paddings[2] + paddings[3];
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}
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if (pooling_type == "max") {
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r = xpu::max_pool2d<XPUType>(
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dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(x.data<T>()),
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reinterpret_cast<XPUType*>(out->data<T>()),
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index_data,
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n,
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c,
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in_h,
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in_w,
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kernel_size,
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strides,
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paddings,
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true);
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} else if (pooling_type == "avg") {
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r = xpu::avg_pool2d<XPUType>(
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dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(x.data<T>()),
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reinterpret_cast<XPUType*>(out->data<T>()),
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n,
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c,
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in_h,
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in_w,
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kernel_size,
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strides,
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paddings,
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!exclusive,
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true);
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} else {
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PADDLE_THROW(common::errors::InvalidArgument(
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"Unsupported pooling type for kunlun %s", pooling_type));
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}
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} else {
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if (pooling_type == "max") {
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r = xpu::adaptive_max_pool2d<XPUType>(
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dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(x.data<T>()),
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reinterpret_cast<XPUType*>(out->data<T>()),
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index_data,
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n,
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c,
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in_h,
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in_w,
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out_h,
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out_w,
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true);
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} else if (pooling_type == "avg") {
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r = xpu::adaptive_avg_pool2d<XPUType>(
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dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(x.data<T>()),
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reinterpret_cast<XPUType*>(out->data<T>()),
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n,
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c,
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in_h,
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in_w,
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out_h,
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out_w,
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true);
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} else {
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PADDLE_THROW(common::errors::InvalidArgument(
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"Unsupported pooling type for kunlun %s", pooling_type));
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}
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}
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "pool2d");
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}
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template <typename T, typename Context>
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void Pool3dKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const std::vector<int64_t>& kernel_size_t,
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const std::vector<int64_t>& strides,
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const std::vector<int64_t>& paddings_t,
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bool ceil_mode,
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bool exclusive,
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const std::string& data_format,
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const std::string& pooling_type,
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bool global_pooling,
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bool adaptive,
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const std::string& padding_algorithm,
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DenseTensor* out) {
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if (x.numel() == 0) {
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if (pooling_type == "max" || pooling_type == "avg") {
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Full<T, Context>(dev_ctx, out->dims(), 0, out);
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} else {
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Full<T, Context>(dev_ctx, out->dims(), NAN, out);
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}
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return;
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}
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using XPUType = typename XPUTypeTrait<T>::Type;
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const bool channel_last = data_format == "NDHWC";
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std::vector<int64_t> kernel_size(kernel_size_t.begin(), kernel_size_t.end());
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std::vector<int64_t> paddings(paddings_t.begin(), paddings_t.end());
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auto x_dims = x.dims();
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int64_t n = x.dims()[0];
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int64_t c = x.dims()[1];
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int64_t in_d = x.dims()[2];
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int64_t in_h = x.dims()[3];
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int64_t in_w = x.dims()[4];
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int64_t out_d = out->dims()[2];
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int64_t out_h = out->dims()[3];
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int64_t out_w = out->dims()[4];
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if (data_format == "NDHWC") {
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c = x.dims()[4];
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in_d = x.dims()[1];
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in_h = x.dims()[2];
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in_w = x.dims()[3];
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out_d = out->dims()[1];
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out_h = out->dims()[2];
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out_w = out->dims()[3];
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}
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DDim data_dims;
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if (channel_last) {
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data_dims = slice_ddim(x_dims, 1, x_dims.size() - 1);
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} else {
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data_dims = slice_ddim(x_dims, 2, x_dims.size());
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}
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funcs::UpdatePadding(&paddings,
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global_pooling,
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adaptive,
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padding_algorithm,
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data_dims,
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strides,
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kernel_size);
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if (global_pooling) {
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funcs::UpdateKernelSize(&kernel_size, data_dims);
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}
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dev_ctx.template Alloc<T>(out);
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int* index_data = nullptr;
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int r = 0;
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if (!adaptive) {
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if (pooling_type == "max") {
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r = xpu::max_pool3d<XPUType>(
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dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(x.data<T>()),
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reinterpret_cast<XPUType*>(out->data<T>()),
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index_data,
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n,
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c,
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in_d,
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in_h,
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in_w,
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kernel_size,
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strides,
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paddings,
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data_format == "NCDHW");
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} else if (pooling_type == "avg") {
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r = xpu::avg_pool3d<XPUType>(
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dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(x.data<T>()),
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reinterpret_cast<XPUType*>(out->data<T>()),
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n,
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c,
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in_d,
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in_h,
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in_w,
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kernel_size,
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strides,
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paddings,
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!exclusive,
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data_format == "NCDHW");
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} else {
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PADDLE_THROW(common::errors::InvalidArgument(
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"Unsupported pooling type for kunlun %s", pooling_type));
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}
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} else {
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if (pooling_type == "max") {
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r = xpu::adaptive_max_pool3d<XPUType>(
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dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(x.data<T>()),
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reinterpret_cast<XPUType*>(out->data<T>()),
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index_data,
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n,
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c,
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in_d,
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in_h,
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in_w,
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out_d,
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out_h,
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out_w,
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data_format == "NCDHW");
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} else if (pooling_type == "avg") {
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r = xpu::adaptive_avg_pool3d<XPUType>(
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dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(x.data<T>()),
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reinterpret_cast<XPUType*>(out->data<T>()),
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n,
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c,
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in_d,
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in_h,
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in_w,
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out_d,
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out_h,
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out_w,
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data_format == "NCDHW");
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} else {
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PADDLE_THROW(common::errors::InvalidArgument(
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"Unsupported pooling type for kunlun %s", pooling_type));
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}
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}
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "pool3d");
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}
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template <typename T, typename Context>
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void MaxPool2dWithIndexKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const std::vector<int>& kernel_size_t,
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const std::vector<int>& strides_t,
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const std::vector<int>& paddings_t,
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const std::vector<int>& dilations_t,
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bool global_pooling,
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bool adaptive,
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bool ceil_mode UNUSED,
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DenseTensor* out,
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DenseTensor* mask) {
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// Check dilation support - XPU only supports dilation=1
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for (size_t i = 0; i < dilations_t.size(); ++i) {
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PADDLE_ENFORCE_EQ(
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dilations_t[i],
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1,
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common::errors::Unimplemented(
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"MaxPool2dWithIndex on XPU currently does not support "
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"dilation != 1. Got dilation[%d] = %d. Please use CPU device.",
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static_cast<int>(i),
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dilations_t[i]));
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}
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if (x.numel() == 0) {
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if (out) {
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Full<T, Context>(dev_ctx, out->dims(), NAN, out);
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}
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if (mask) {
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Full<int, Context>(dev_ctx, mask->dims(), 0, mask);
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}
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return;
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}
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using XPUType = typename XPUTypeTrait<T>::Type;
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dev_ctx.template Alloc<int>(mask);
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auto* index_data = mask->data<int>();
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std::vector<int64_t> kernel_size(kernel_size_t.begin(), kernel_size_t.end());
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std::vector<int64_t> strides(strides_t.begin(), strides_t.end());
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std::vector<int64_t> paddings(paddings_t.begin(), paddings_t.end());
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PADDLE_ENFORCE_EQ(kernel_size.size(),
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2,
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common::errors::InvalidArgument(
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"The Pool2d XPU OP only support 2 dimension pooling, "
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"but received kernel_size with size %d",
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kernel_size.size()));
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PADDLE_ENFORCE_EQ(!adaptive || (kernel_size[0] * kernel_size[1] == 1),
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true,
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common::errors::InvalidArgument(
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"The Pool2d XPU OP does not support (adaptive == "
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"true && output_size != 1)"));
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global_pooling =
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global_pooling || (adaptive && (kernel_size[0] * kernel_size[1] == 1));
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if (global_pooling) {
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for (size_t i = 0; i < kernel_size.size(); ++i) {
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paddings[i] = 0;
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kernel_size[i] = x.dims()[i + 2];
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}
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}
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const int64_t n = x.dims()[0];
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const int64_t c = x.dims()[1];
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const int64_t in_h = x.dims()[2];
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const int64_t in_w = x.dims()[3];
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auto input = reinterpret_cast<const XPUType*>(x.data<T>());
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dev_ctx.template Alloc<T>(out);
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auto output = reinterpret_cast<XPUType*>(out->data<T>());
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int r = 0;
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r = xpu::max_pool2d<XPUType>(dev_ctx.x_context(),
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input,
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output,
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index_data,
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n,
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c,
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in_h,
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in_w,
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kernel_size,
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strides,
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paddings,
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true);
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "max_pool2d_with_index");
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}
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} // namespace phi
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PD_REGISTER_KERNEL(
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pool2d, XPU, ALL_LAYOUT, phi::Pool2dKernel, float, phi::float16) {}
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PD_REGISTER_KERNEL(
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pool3d, XPU, ALL_LAYOUT, phi::Pool3dKernel, float, phi::float16) {}
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PD_REGISTER_KERNEL(max_pool2d_with_index,
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XPU,
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ALL_LAYOUT,
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phi::MaxPool2dWithIndexKernel,
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float,
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phi::float16) {
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kernel->OutputAt(1).SetDataType(phi::DataType::INT32);
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}
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