wehub-resource-sync
113 lines
4.5 KiB
C++
113 lines
4.5 KiB
C++
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/dropout_grad_kernel.h"
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#include <memory>
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#include <string>
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#include "paddle/phi/backends/xpu/enforce_xpu.h"
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#include "paddle/phi/core/kernel_registry.h"
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namespace phi {
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template <typename T, typename Context>
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void DropoutGradRawKernel(const Context& dev_ctx,
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const DenseTensor& mask,
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const DenseTensor& out_grad,
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const Scalar& p,
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bool is_test,
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const std::string& mode,
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DenseTensor* x_grad) {
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using XPUType = typename XPUTypeTrait<T>::Type;
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PADDLE_ENFORCE_EQ(!is_test,
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true,
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common::errors::InvalidArgument(
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"GradOp is only callable when is_test is false"));
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auto* grad_x = x_grad;
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auto* grad_y = &out_grad;
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dev_ctx.template Alloc<T>(grad_x);
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float dropout_prob = p.to<float>();
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const uint8_t* mask_data = mask.data<uint8_t>();
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xpu::ctx_guard RAII_GUARD(dev_ctx.x_context());
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XPUType* mask_tmp_data = nullptr;
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auto dev_version =
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backends::xpu::get_xpu_version(dev_ctx.GetPlace().GetDeviceId());
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if (mode != "upscale_in_train") {
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mask_tmp_data = RAII_GUARD.alloc_l3_or_gm<XPUType>(mask.numel());
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int r = xpu::cast<uint8_t, XPUType>(
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dev_ctx.x_context(), mask_data, mask_tmp_data, mask.numel());
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "cast");
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r = xpu::mul(dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(grad_y->data<T>()),
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reinterpret_cast<const XPUType*>(mask_tmp_data),
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reinterpret_cast<XPUType*>(grad_x->data<T>()),
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grad_y->numel());
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "mul");
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return;
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}
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if (dev_version == backends::xpu::XPUVersion::XPU3) {
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int r = xpu::dropout_grad_v2(
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dev_ctx.x_context(),
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mask_data,
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reinterpret_cast<const XPUType*>(grad_y->data<T>()),
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reinterpret_cast<XPUType*>(grad_x->data<T>()),
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dropout_prob,
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grad_y->numel());
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "dropout_grad_v2");
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} else if (dev_version == backends::xpu::XPUVersion::XPU1) {
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mask_tmp_data = RAII_GUARD.alloc_l3_or_gm<XPUType>(mask.numel());
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int r = xpu::cast<uint8_t, XPUType>(
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dev_ctx.x_context(), mask_data, mask_tmp_data, mask.numel());
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float scale =
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(dropout_prob == 1.0f) ? (1.0f) : (1.0f / (1.0f - dropout_prob));
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r = xpu::scale(dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(mask_tmp_data),
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reinterpret_cast<XPUType*>(mask_tmp_data),
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mask.numel(),
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false,
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scale,
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0.0f);
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "scale");
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r = xpu::mul(dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(grad_y->data<T>()),
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reinterpret_cast<const XPUType*>(mask_tmp_data),
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reinterpret_cast<XPUType*>(grad_x->data<T>()),
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grad_y->numel());
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "mul");
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} else {
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mask_tmp_data = RAII_GUARD.alloc_l3_or_gm<XPUType>(mask.numel());
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int r = xpu::cast<uint8_t, XPUType>(
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dev_ctx.x_context(), mask_data, mask_tmp_data, mask.numel());
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r = xpu::dropout_grad(dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(mask_tmp_data),
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reinterpret_cast<const XPUType*>(grad_y->data<T>()),
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reinterpret_cast<XPUType*>(grad_x->data<T>()),
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dropout_prob,
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grad_y->numel());
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "dropout_grad");
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(dropout_grad,
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XPU,
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ALL_LAYOUT,
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phi::DropoutGradRawKernel,
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float,
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phi::float16,
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phi::bfloat16) {}
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