85 lines
2.9 KiB
C++
85 lines
2.9 KiB
C++
/* Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/phi/kernels/arange_kernel.h"
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#include "paddle/phi/backends/xpu/enforce_xpu.h"
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#include "paddle/phi/common/amp_type_traits.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/core/visit_type.h"
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#include "paddle/phi/kernels/funcs/range_function.h"
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namespace phi {
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template <typename T, typename Context>
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void ArangeTensorKernel(const Context& dev_ctx,
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const DenseTensor& start,
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const DenseTensor& end,
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const DenseTensor& step,
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DenseTensor* out) {
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bool any_float = phi::IsFloatingType(start.dtype()) ||
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phi::IsFloatingType(end.dtype()) ||
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phi::IsFloatingType(step.dtype());
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int64_t size = 0;
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using XPUType = typename XPUTypeTrait<T>::Type;
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Scalar start_scalar(start);
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Scalar end_scalar(end);
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Scalar step_scalar(step);
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XPUType start_value;
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XPUType step_value;
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if (any_float) {
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double sv = start_scalar.to<double>();
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double ev = end_scalar.to<double>();
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double stv = step_scalar.to<double>();
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funcs::GetSize<double>(sv, ev, stv, &size);
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start_value = static_cast<XPUType>(sv);
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step_value = static_cast<XPUType>(stv);
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} else {
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int64_t sv = start_scalar.to<int64_t>();
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int64_t ev = end_scalar.to<int64_t>();
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int64_t stv = step_scalar.to<int64_t>();
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funcs::GetSize<int64_t>(sv, ev, stv, &size);
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start_value = static_cast<XPUType>(sv);
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step_value = static_cast<XPUType>(stv);
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}
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if (size == 0) {
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out->Resize({0});
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dev_ctx.template Alloc<T>(out);
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return;
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}
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out->Resize({size});
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XPUType* out_data =
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reinterpret_cast<XPUType*>(dev_ctx.template Alloc<T>(out));
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int ret =
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xpu::range(dev_ctx.x_context(), out_data, start_value, step_value, size);
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PADDLE_ENFORCE_XDNN_SUCCESS(ret, "range");
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}
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} // namespace phi
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PD_REGISTER_KERNEL(arange_tensor,
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XPU,
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ALL_LAYOUT,
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phi::ArangeTensorKernel,
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float,
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phi::float16,
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phi::bfloat16,
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int,
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int64_t) {
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kernel->InputAt(0).SetBackend(phi::Backend::ALL_BACKEND);
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kernel->InputAt(1).SetBackend(phi::Backend::ALL_BACKEND);
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kernel->InputAt(2).SetBackend(phi::Backend::ALL_BACKEND);
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}
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