104 lines
3.5 KiB
C++
104 lines
3.5 KiB
C++
// Copyright (c) 2024 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/affine_channel_grad_kernel.h"
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#include <string>
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#include <unordered_map>
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#include <vector>
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#include "paddle/phi/backends/xpu/enforce_xpu.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/eigen/common.h"
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namespace phi {
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template <typename T, typename Context>
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void AffineChannelGradXPUKernel(const Context& dev_ctx,
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const DenseTensor& x_in,
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const DenseTensor& scale_in,
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const DenseTensor& bias_in,
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const DenseTensor& out_grad,
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const std::string& data_layout,
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DenseTensor* x_grad,
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DenseTensor* scale_grad,
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DenseTensor* bias_grad) {
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auto* x = &x_in;
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auto* scale = &scale_in;
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auto* dy = &out_grad;
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auto* dx = x_grad;
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auto* dscale = scale_grad;
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auto* dbias = bias_grad;
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const DataLayout layout = StringToDataLayout(data_layout);
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auto dims = x->dims();
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int64_t N = dims[0];
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int64_t C = (layout == DataLayout::NCHW) ? dims[1] : dims[dims.size() - 1];
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int64_t HxW = x->numel() / N / C;
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auto* dy_d = dy->data<T>();
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auto* scale_d = scale->data<T>();
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T* dx_d = dx ? dev_ctx.template Alloc<T>(dx) : nullptr;
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T* dscale_d = dscale ? dev_ctx.template Alloc<T>(dscale) : nullptr;
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T* dbias_d = dbias ? dev_ctx.template Alloc<T>(dbias) : nullptr;
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std::vector<int64_t> x_shape;
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std::vector<int64_t> b_shape;
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std::vector<int64_t> rdims;
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if (layout == DataLayout::NCHW) {
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x_shape.push_back(N);
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x_shape.push_back(C);
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x_shape.push_back(HxW);
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b_shape.push_back(1);
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b_shape.push_back(C);
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b_shape.push_back(1);
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rdims.push_back(0);
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rdims.push_back(2);
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} else {
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x_shape.push_back(N * HxW);
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x_shape.push_back(C);
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b_shape.push_back(1);
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b_shape.push_back(C);
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rdims.push_back(0);
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}
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int r = 0;
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if (dscale_d && dbias_d) {
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r = xpu::reduce_sum<T>(dev_ctx.x_context(), dy_d, dbias_d, x_shape, rdims);
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "reduce_sum");
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xpu::ctx_guard RAII_GUARD(dev_ctx.x_context());
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T* tmp = RAII_GUARD.alloc_l3_or_gm<T>(dy->numel());
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PADDLE_ENFORCE_NOT_NULL(
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tmp, common::errors::External("XPU has no enough memory"));
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r = xpu::mul<T>(dev_ctx.x_context(), dy_d, x->data<T>(), tmp, dy->numel());
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "mul");
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r = xpu::reduce_sum<T>(dev_ctx.x_context(), tmp, dscale_d, x_shape, rdims);
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "reduce_sum");
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}
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if (dx_d) {
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r = xpu::broadcast_mul(
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dev_ctx.x_context(), dy_d, scale_d, dx_d, x_shape, b_shape);
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "broadcast_mul");
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(affine_channel_grad,
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XPU,
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ALL_LAYOUT,
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phi::AffineChannelGradXPUKernel,
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float) {}
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