wehub-resource-sync
307 lines
13 KiB
Plaintext
307 lines
13 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/unpool_grad_kernel.h"
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#include <algorithm>
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#include <vector>
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#include "paddle/common/enforce.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/math_function.h"
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namespace phi {
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template <typename T, typename IndT>
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__global__ void KernelUnpool2dMaxGrad(const int64_t nthreads,
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const T* input_data,
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const IndT* indices_data,
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const int input_height,
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const int input_width,
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const int channels,
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const T* output_data,
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const T* output_grad,
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const int output_height,
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const int output_width,
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T* input_grad) {
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CUDA_KERNEL_LOOP_TYPE(linearIndex, nthreads, int64_t) {
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int c = (linearIndex / input_width / input_height) % channels;
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int n = linearIndex / input_width / input_height / channels;
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output_grad += (n * channels + c) * output_height * output_width;
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IndT maxind = indices_data[linearIndex];
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input_grad[linearIndex] = output_grad[maxind];
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}
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}
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template <typename T, typename IndT>
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__global__ void KernelUnpool3dMaxGrad(const int64_t nthreads,
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const T* input_data,
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const IndT* indices_data,
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const int input_depth,
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const int input_height,
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const int input_width,
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const int channels,
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const T* output_data,
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const T* output_grad,
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const int output_depth,
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const int output_height,
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const int output_width,
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T* input_grad) {
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CUDA_KERNEL_LOOP_TYPE(linearIndex, nthreads, int64_t) {
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int c = (linearIndex / input_depth / input_width / input_height) % channels;
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int n = linearIndex / input_depth / input_width / input_height / channels;
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output_grad +=
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(n * channels + c) * output_depth * output_height * output_width;
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IndT maxind = indices_data[linearIndex];
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input_grad[linearIndex] = output_grad[maxind];
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}
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}
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template <typename T, typename IndT, typename Context>
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class Unpool2dMaxGradFunctor {
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public:
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void operator()(const Context& dev_ctx,
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const DenseTensor& input,
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const DenseTensor& indices,
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const DenseTensor& output,
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const DenseTensor& output_grad,
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DenseTensor* input_grad) {
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t batch_size = input.dims()[0];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_height = input.dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_width = input.dims()[3];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_channels = output.dims()[1];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_height = output.dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_width = output.dims()[3];
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const T* input_data = input.data<T>();
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const IndT* indices_data = indices.data<IndT>();
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const T* output_data = output.data<T>();
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const T* output_grad_data = output_grad.data<T>();
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T* input_grad_data = dev_ctx.template Alloc<T>(input_grad);
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// Early return for zero-size input to avoid invalid CUDA kernel launch
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if (input.numel() == 0) {
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return;
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}
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PADDLE_ENFORCE_LE_INT_MAX(input_height, "input_height");
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PADDLE_ENFORCE_LE_INT_MAX(input_width, "input_width");
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PADDLE_ENFORCE_LE_INT_MAX(output_channels, "output_channels");
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PADDLE_ENFORCE_LE_INT_MAX(output_height, "output_height");
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PADDLE_ENFORCE_LE_INT_MAX(output_width, "output_width");
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int input_height_int = static_cast<int>(input_height);
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int input_width_int = static_cast<int>(input_width);
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int output_channels_int = static_cast<int>(output_channels);
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int output_height_int = static_cast<int>(output_height);
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int output_width_int = static_cast<int>(output_width);
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int threads = 1024;
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int64_t grid_max = dev_ctx.GetCUDAMaxGridDimSize()[0];
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int64_t grid_64 =
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std::min((input.numel() + threads - 1) / threads, grid_max);
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PADDLE_ENFORCE_LE_UINT32_MAX(grid_64, "unpool_grad grid.x");
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uint32_t grid = static_cast<uint32_t>(grid_64);
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KernelUnpool2dMaxGrad<T, IndT>
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<<<grid, threads, 0, dev_ctx.stream()>>>(input.numel(),
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input_data,
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indices_data,
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input_height_int,
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input_width_int,
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output_channels_int,
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output_data,
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output_grad_data,
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output_height_int,
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output_width_int,
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input_grad_data);
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}
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};
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template <typename T, typename IndT, typename Context>
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class Unpool3dMaxGradFunctor {
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public:
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void operator()(const Context& dev_ctx,
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const DenseTensor& input,
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const DenseTensor& indices,
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const DenseTensor& output,
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const DenseTensor& output_grad,
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DenseTensor* input_grad) {
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t batch_size = input.dims()[0];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_depth = input.dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_height = input.dims()[3];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_width = input.dims()[4];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_channels = output.dims()[1];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_depth = output.dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_height = output.dims()[3];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_width = output.dims()[4];
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const T* input_data = input.data<T>();
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const IndT* indices_data = indices.data<IndT>();
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const T* output_data = output.data<T>();
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const T* output_grad_data = output_grad.data<T>();
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T* input_grad_data = dev_ctx.template Alloc<T>(input_grad);
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// Early return for zero-size input to avoid invalid CUDA kernel launch
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if (input.numel() == 0) {
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return;
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}
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PADDLE_ENFORCE_LE_INT_MAX(input_depth, "input_depth");
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PADDLE_ENFORCE_LE_INT_MAX(input_height, "input_height");
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PADDLE_ENFORCE_LE_INT_MAX(input_width, "input_width");
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PADDLE_ENFORCE_LE_INT_MAX(output_channels, "output_channels");
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PADDLE_ENFORCE_LE_INT_MAX(output_depth, "output_depth");
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PADDLE_ENFORCE_LE_INT_MAX(output_height, "output_height");
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PADDLE_ENFORCE_LE_INT_MAX(output_width, "output_width");
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int input_depth_int = static_cast<int>(input_depth);
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int input_height_int = static_cast<int>(input_height);
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int input_width_int = static_cast<int>(input_width);
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int output_channels_int = static_cast<int>(output_channels);
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int output_depth_int = static_cast<int>(output_depth);
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int output_height_int = static_cast<int>(output_height);
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int output_width_int = static_cast<int>(output_width);
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int threads = 1024;
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int64_t grid_max = dev_ctx.GetCUDAMaxGridDimSize()[0];
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int64_t grid_64 =
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std::min((input.numel() + threads - 1) / threads, grid_max);
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PADDLE_ENFORCE_LE_UINT32_MAX(grid_64, "unpool_grad grid.x");
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uint32_t grid = static_cast<uint32_t>(grid_64);
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KernelUnpool3dMaxGrad<T, IndT>
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<<<grid, threads, 0, dev_ctx.stream()>>>(input.numel(),
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input_data,
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indices_data,
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input_depth_int,
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input_height_int,
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input_width_int,
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output_channels_int,
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output_data,
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output_grad_data,
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output_depth_int,
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output_height_int,
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output_width_int,
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input_grad_data);
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}
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};
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template <typename T, typename Context>
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void UnpoolGradKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& indices,
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const DenseTensor& out,
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const DenseTensor& out_grad,
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const std::vector<int>& ksize,
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const std::vector<int>& strides,
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const std::vector<int>& paddings,
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const IntArray& output_size,
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const std::string& data_format,
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DenseTensor* x_grad) {
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T* input_grad_data = dev_ctx.template Alloc<T>(x_grad);
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if (x_grad && x_grad->numel() == 0) {
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return;
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}
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const T* output_grad_data = out_grad.data<T>();
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funcs::SetConstant<Context, T> zero;
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zero(dev_ctx, x_grad, static_cast<T>(0));
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const auto& indices_type = indices.dtype();
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if (indices_type == DataType::INT32) {
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Unpool2dMaxGradFunctor<T, int, Context> unpool2d_max_backward;
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unpool2d_max_backward(dev_ctx, x, indices, out, out_grad, x_grad);
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} else {
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Unpool2dMaxGradFunctor<T, int64_t, Context> unpool2d_max_backward;
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unpool2d_max_backward(dev_ctx, x, indices, out, out_grad, x_grad);
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}
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}
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template <typename T, typename Context>
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void Unpool3dGradKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& indices,
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const DenseTensor& out,
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const DenseTensor& out_grad,
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const std::vector<int>& ksize,
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const std::vector<int>& strides,
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const std::vector<int>& paddings,
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const std::vector<int>& output_size,
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const std::string& data_format,
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DenseTensor* x_grad) {
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T* input_grad_data = dev_ctx.template Alloc<T>(x_grad);
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if (x_grad && x_grad->numel() == 0) {
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return;
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}
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const T* output_grad_data = out_grad.data<T>();
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funcs::SetConstant<Context, T> zero;
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zero(dev_ctx, x_grad, static_cast<T>(0));
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const auto& indices_type = indices.dtype();
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if (indices_type == DataType::INT32) {
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Unpool3dMaxGradFunctor<T, int, Context> unpool3d_max_backward;
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unpool3d_max_backward(dev_ctx, x, indices, out, out_grad, x_grad);
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} else {
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Unpool3dMaxGradFunctor<T, int64_t, Context> unpool3d_max_backward;
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unpool3d_max_backward(dev_ctx, x, indices, out, out_grad, x_grad);
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(unpool_grad,
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GPU,
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ALL_LAYOUT,
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phi::UnpoolGradKernel,
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float,
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double,
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int64_t) {}
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PD_REGISTER_KERNEL(unpool3d_grad,
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GPU,
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ALL_LAYOUT,
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phi::Unpool3dGradKernel,
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float,
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double,
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int64_t) {}
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