wehub-resource-sync
355 lines
15 KiB
Plaintext
355 lines
15 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/send_uv_grad_kernel.h"
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#include "paddle/common/enforce.h"
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#include "paddle/common/hostdevice.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/empty_kernel.h"
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#include "paddle/phi/kernels/full_kernel.h"
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#include "paddle/phi/kernels/funcs/elementwise_functor.h"
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#include "paddle/phi/kernels/funcs/math_function.h"
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#include "paddle/phi/kernels/gpu/graph_send_recv_funcs.h"
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#include "paddle/phi/kernels/gpu/graph_send_ue_recv_funcs.h"
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#include "paddle/phi/kernels/impl/graph_message_passing_impl.h"
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#include "paddle/phi/kernels/reduce_sum_kernel.h"
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namespace phi {
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template <typename T, typename IndexT>
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__global__ void GraphSendUVGradCUDAKernel(const T* out_grad,
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const IndexT* src_indices,
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const IndexT* dst_indices,
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int64_t index_size,
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int64_t slice_size,
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T* x_grad) {
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IndexT ty = blockIdx.y * blockDim.y + threadIdx.y;
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const IndexT stride_y = blockDim.y * gridDim.y;
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while (ty < index_size) {
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IndexT src = src_indices[ty];
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IndexT dst = dst_indices[ty];
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int64_t tx =
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static_cast<int64_t>(blockIdx.x) * static_cast<int64_t>(blockDim.x) +
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static_cast<int64_t>(threadIdx.x);
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int64_t stride_x =
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static_cast<int64_t>(blockDim.x) * static_cast<int64_t>(gridDim.x);
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const T* out_grad_off = out_grad + ty * slice_size;
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T* x_grad_off = x_grad + dst * slice_size;
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while (tx < slice_size) {
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CudaAtomicAdd(x_grad_off + tx, out_grad_off[tx]);
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tx += stride_x;
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}
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ty += stride_y;
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}
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}
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template <typename Context, typename T, typename IndexT>
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void CalculateGrad(const Context& dev_ctx,
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const T* out_grad,
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const IndexT* s_index,
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const IndexT* d_index,
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const DDim& out_grad_dims,
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const DDim& x_grad_dims,
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const std::string& message_op,
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int64_t index_size,
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int64_t slice_size,
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T* x_grad,
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const DenseTensor& out_grad_tensor,
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const DenseTensor& y) {
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std::vector<int64_t> reduce_idx;
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bool reduce = ReduceGrad(out_grad_dims, x_grad_dims, reduce_idx);
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if (message_op == "ADD") {
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if (!reduce) {
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const int ntx =
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FindNumThreads(slice_size, dev_ctx.GetMaxThreadsPerBlock());
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const int nty = dev_ctx.GetMaxThreadsPerBlock() / ntx;
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const int64_t nbx_64 = (slice_size + ntx - 1) / ntx;
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PADDLE_ENFORCE_LE_INT_MAX(nbx_64, "grid.x");
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const int nbx = static_cast<int>(nbx_64);
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const int64_t nby_64 = (index_size + nty - 1) / nty;
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const int nby = FindNumBlocks('y', nby_64);
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const dim3 grid_tmp(nbx, nby);
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const dim3 block_tmp(ntx, nty);
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GraphSendUVGradCUDAKernel<T, IndexT>
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<<<grid_tmp, block_tmp, 0, dev_ctx.stream()>>>(
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out_grad, d_index, s_index, index_size, slice_size, x_grad);
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} else {
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const auto& bcast_info = CalcBCastInfo(out_grad_dims, x_grad_dims);
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auto out_grad_dims_1 = vectorize<int>(out_grad_dims);
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std::vector<int> out_grad_dims_2(out_grad_dims_1.begin() + 1,
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out_grad_dims_1.end());
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out_grad_dims_2.insert(out_grad_dims_2.begin(), x_grad_dims[0]);
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DenseTensor x_grad_v2 = Empty<T, Context>(dev_ctx, out_grad_dims_2);
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funcs::SetConstant<Context, T>()(dev_ctx, &x_grad_v2, T(0));
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T* x_grad_v2_data = x_grad_v2.data<T>();
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const int ntx =
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FindNumThreads(bcast_info.out_len, dev_ctx.GetMaxThreadsPerBlock());
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const int nty = dev_ctx.GetMaxThreadsPerBlock() / ntx;
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const int64_t nbx_64 = (bcast_info.out_len + ntx - 1) / ntx;
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PADDLE_ENFORCE_LE_INT_MAX(nbx_64, "grid.x");
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const int nbx = static_cast<int>(nbx_64);
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const int64_t nby_64 = (index_size + nty - 1) / nty;
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const int nby = FindNumBlocks('y', nby_64);
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const dim3 grid_tmp(nbx, nby);
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const dim3 block_tmp(ntx, nty);
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GraphSendUVGradCUDAKernel<T, IndexT>
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<<<grid_tmp, block_tmp, 0, dev_ctx.stream()>>>(out_grad,
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d_index,
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s_index,
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index_size,
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bcast_info.out_len,
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x_grad_v2_data);
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// Run reduce sum
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DenseTensor x_grad_out = Sum<T, Context>(dev_ctx,
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x_grad_v2,
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IntArray(reduce_idx),
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CppTypeToDataType<T>::Type(),
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true);
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#ifdef PADDLE_WITH_HIP
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hipMemcpy(x_grad,
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x_grad_out.data<T>(),
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x_grad_out.numel() * sizeof(T),
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hipMemcpyDeviceToDevice);
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#else
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cudaMemcpyAsync(x_grad,
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x_grad_out.data<T>(),
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x_grad_out.numel() * sizeof(T),
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cudaMemcpyDeviceToDevice,
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dev_ctx.stream());
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#endif
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}
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} else if (message_op == "MUL") {
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const auto& bcast_info = CalcBCastInfo(y.dims(), out_grad_dims);
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thrust::device_vector<int64_t> l_bcastoff, r_bcastoff;
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if (bcast_info.use_bcast) {
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CopyBCastOff(bcast_info, &l_bcastoff, &r_bcastoff);
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}
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int64_t out_len = bcast_info.out_len;
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const int ntx = FindNumThreads(out_len, dev_ctx.GetMaxThreadsPerBlock());
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const int nty = dev_ctx.GetMaxThreadsPerBlock() / ntx;
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const int64_t nbx_64 = (out_len + ntx - 1) / ntx;
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PADDLE_ENFORCE_LE_INT_MAX(nbx_64, "grid.x");
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const int nbx = static_cast<int>(nbx_64);
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const int64_t nby_64 = (index_size + nty - 1) / nty;
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const int nby = FindNumBlocks('y', nby_64);
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const dim3 grid_(nbx, nby);
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const dim3 block_(ntx, nty);
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funcs::MultiplyFunctor<T> mul_functor;
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GraphSendUERecvSumCUDAFunctor<T> sum_functor;
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const T* y_data = y.data<T>();
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if (!reduce) {
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GraphSendUERecvCUDAKernel<T,
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IndexT,
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GraphSendUERecvSumCUDAFunctor<T>,
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funcs::MultiplyFunctor<T>>
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<<<grid_, block_, 0, dev_ctx.stream()>>>(
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y_data,
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out_grad,
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d_index,
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s_index,
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thrust::raw_pointer_cast(l_bcastoff.data()),
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thrust::raw_pointer_cast(r_bcastoff.data()),
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x_grad,
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index_size,
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bcast_info.l_len,
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bcast_info.r_len,
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out_len,
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bcast_info.use_bcast,
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mul_functor,
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sum_functor);
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} else {
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auto out_grad_dims_1 = vectorize<int>(out_grad_dims);
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std::vector<int> out_grad_dims_2(out_grad_dims_1.begin() + 1,
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out_grad_dims_1.end());
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out_grad_dims_2.insert(out_grad_dims_2.begin(), x_grad_dims[0]);
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DenseTensor x_grad_v2 = Empty<T, Context>(dev_ctx, out_grad_dims_2);
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funcs::SetConstant<Context, T>()(dev_ctx, &x_grad_v2, T(0));
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T* x_grad_v2_data = x_grad_v2.data<T>();
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GraphSendUERecvCUDAKernel<T,
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IndexT,
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GraphSendUERecvSumCUDAFunctor<T>,
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funcs::MultiplyFunctor<T>>
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<<<grid_, block_, 0, dev_ctx.stream()>>>(
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y_data,
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out_grad,
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d_index,
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s_index,
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thrust::raw_pointer_cast(l_bcastoff.data()),
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thrust::raw_pointer_cast(r_bcastoff.data()),
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x_grad_v2_data,
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index_size,
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bcast_info.l_len,
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bcast_info.r_len,
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out_len,
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bcast_info.use_bcast,
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mul_functor,
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sum_functor);
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// Run reduce_sum
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DenseTensor x_grad_out = Sum<T, Context>(dev_ctx,
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x_grad_v2,
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IntArray(reduce_idx),
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CppTypeToDataType<T>::Type(),
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true);
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#ifdef PADDLE_WITH_HIP
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hipMemcpy(x_grad,
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x_grad_out.data<T>(),
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x_grad_out.numel() * sizeof(T),
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hipMemcpyDeviceToDevice);
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#else
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cudaMemcpyAsync(x_grad,
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x_grad_out.data<T>(),
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x_grad_out.numel() * sizeof(T),
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cudaMemcpyDeviceToDevice,
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dev_ctx.stream());
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#endif
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}
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}
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}
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template <typename Context, typename T, typename IndexT>
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void GraphSendUVGradOpCUDAKernelLaunchHelper(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& y,
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const DenseTensor& out_grad,
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const DenseTensor& src_index,
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const DenseTensor& dst_index,
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const std::string& message_op,
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DenseTensor* x_grad,
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DenseTensor* y_grad) {
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const int64_t& index_size = dst_index.dims()[0];
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PADDLE_ENFORCE_GT(
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index_size,
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0,
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errors::InvalidArgument("The first dimension of src_index or dst_index "
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"should be greater than 0, but received %d.",
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index_size));
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dev_ctx.template Alloc<T>(x_grad);
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T* x_grad_data = x_grad->data<T>();
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dev_ctx.template Alloc<T>(y_grad);
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T* y_grad_data = y_grad->data<T>();
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const auto& x_grad_dims = x_grad->dims();
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const auto& y_grad_dims = y_grad->dims();
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int64_t memset_size_x = 1, memset_size_y = 1;
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int64_t slice_size_x = 1, slice_size_y = 1;
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for (int i = 0; i < x_grad_dims.size(); i++) {
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memset_size_x *= x_grad_dims[i];
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if (i > 0) slice_size_x *= x_grad_dims[i];
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}
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for (int i = 0; i < y_grad_dims.size(); i++) {
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memset_size_y *= y_grad_dims[i];
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if (i > 0) slice_size_y *= y_grad_dims[i];
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}
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const size_t& memset_bytes_x = memset_size_x * sizeof(T);
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const size_t& memset_bytes_y = memset_size_y * sizeof(T);
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#ifdef PADDLE_WITH_HIP
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hipMemset(x_grad_data, 0, memset_bytes_x);
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hipMemset(y_grad_data, 0, memset_bytes_y);
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#else
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cudaMemsetAsync(x_grad_data, 0, memset_bytes_x, dev_ctx.stream());
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cudaMemsetAsync(y_grad_data, 0, memset_bytes_y, dev_ctx.stream());
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#endif
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const T* out_grad_data = out_grad.data<T>();
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const IndexT* s_index = src_index.data<IndexT>();
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const IndexT* d_index = dst_index.data<IndexT>();
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// Calculate X grad.
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const auto& out_grad_dims = out_grad.dims();
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CalculateGrad<Context, T, IndexT>(dev_ctx,
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out_grad_data,
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s_index,
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d_index,
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out_grad_dims,
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x_grad_dims,
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message_op,
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index_size,
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slice_size_x,
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x_grad_data,
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out_grad,
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y);
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// Calculate Y grad.
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CalculateGrad<Context, T, IndexT>(dev_ctx,
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out_grad_data,
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d_index,
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s_index,
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out_grad_dims,
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y_grad_dims,
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message_op,
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index_size,
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slice_size_y,
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y_grad_data,
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out_grad,
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x);
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}
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template <typename T, typename Context>
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void SendUVGradKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& y,
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const DenseTensor& src_index,
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const DenseTensor& dst_index,
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const DenseTensor& out_grad,
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const std::string& message_op,
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DenseTensor* x_grad,
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DenseTensor* y_grad) {
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auto index_type = src_index.dtype();
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if (out_grad.numel() == 0 || x.numel() == 0 || y.numel() == 0 ||
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src_index.numel() == 0 || dst_index.numel() == 0) {
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Full<T, Context>(dev_ctx, x_grad->dims(), 0, x_grad);
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Full<T, Context>(dev_ctx, y_grad->dims(), 0, y_grad);
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return;
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}
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if (index_type == DataType::INT32) {
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GraphSendUVGradOpCUDAKernelLaunchHelper<Context, T, int32_t>(dev_ctx,
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x,
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y,
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out_grad,
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src_index,
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dst_index,
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message_op,
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x_grad,
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y_grad);
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} else if (index_type == DataType::INT64) {
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GraphSendUVGradOpCUDAKernelLaunchHelper<Context, T, int64_t>(dev_ctx,
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x,
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y,
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out_grad,
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src_index,
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dst_index,
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message_op,
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x_grad,
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y_grad);
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(send_uv_grad,
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GPU,
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ALL_LAYOUT,
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phi::SendUVGradKernel,
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float,
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double,
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int,
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int64_t,
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phi::float16) {}
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