wehub-resource-sync
363 lines
13 KiB
Plaintext
363 lines
13 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/send_ue_recv_kernel.h"
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#include <thrust/device_vector.h>
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#include <thrust/execution_policy.h>
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#include <thrust/fill.h>
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#include <algorithm>
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#include <vector>
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#include "paddle/common/enforce.h"
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#include "paddle/common/hostdevice.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/full_kernel.h"
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#include "paddle/phi/kernels/funcs/elementwise_functor.h"
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#include "paddle/phi/kernels/funcs/math_function.h"
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#include "paddle/phi/kernels/gpu/graph_send_recv_funcs.h"
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#include "paddle/phi/kernels/gpu/graph_send_ue_recv_funcs.h"
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#include "paddle/phi/kernels/impl/graph_message_passing_impl.h"
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namespace phi {
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template <typename Context, typename T, typename IndexT>
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void GraphSendUERecvOpCUDAKernelLaunchHelper(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& e,
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const DenseTensor& src_index,
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const DenseTensor& dst_index,
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const std::string& message_op,
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const std::string& reduce_op,
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int64_t out_size,
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DenseTensor* out,
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DenseTensor* dst_count = nullptr) {
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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const int64_t& index_size = src_index.dims()[0];
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auto out_dims = out->dims();
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int64_t memset_size = 1;
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std::vector<int64_t> dims_ = vectorize(out_dims);
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if (out_size <= 0) {
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dims_[0] = x.dims()[0];
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} else {
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dims_[0] = out_size;
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}
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out->Resize(dims_);
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for (size_t i = 0; i < dims_.size(); i++) {
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memset_size *= dims_[i];
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}
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// For float16/bfloat16 with reduce_op MIN/MAX, CudaAtomicMin/Max uses 4-byte
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// atomicCAS on 2-byte values. When the total element count is odd, the last
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// element's 4-byte CAS can read 2 bytes past the allocation boundary.
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// Request extra padding to avoid this out-of-bounds access.
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size_t requested_size = 0;
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if (sizeof(T) == 2 && (memset_size % 2 != 0) &&
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(reduce_op == "MAX" || reduce_op == "MIN")) {
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requested_size = (memset_size + 1) * sizeof(T);
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}
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dev_ctx.template Alloc<T>(out, requested_size);
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T* out_data = out->data<T>();
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const size_t& memset_bytes = memset_size * sizeof(T);
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funcs::SetConstant<Context, T> constant_functor;
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if (reduce_op == "SUM" || reduce_op == "MEAN") {
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constant_functor(dev_ctx, out, static_cast<T>(0));
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} else if (reduce_op == "MAX") {
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constant_functor(dev_ctx, out, std::numeric_limits<T>::lowest());
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} else if (reduce_op == "MIN") {
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constant_functor(dev_ctx, out, std::numeric_limits<T>::max());
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}
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if (index_size == 0) return;
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const auto& bcast_info = CalcBCastInfo(x.dims(), e.dims());
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const T* x_data = x.data<T>();
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const T* e_data = e.data<T>();
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const IndexT* s_index = src_index.data<IndexT>();
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const IndexT* d_index = dst_index.data<IndexT>();
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thrust::device_vector<int64_t> x_bcastoff, e_bcastoff;
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if (bcast_info.use_bcast) {
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CopyBCastOff(bcast_info, &x_bcastoff, &e_bcastoff);
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}
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int64_t out_len = bcast_info.out_len;
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const int ntx = FindNumThreads(out_len, dev_ctx.GetMaxThreadsPerBlock());
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const int nty = dev_ctx.GetMaxThreadsPerBlock() / ntx;
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const int64_t nbx_64 = (out_len + ntx - 1) / ntx;
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PADDLE_ENFORCE_LE_INT_MAX(nbx_64, "grid.x");
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const int nbx = static_cast<int>(nbx_64);
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const int64_t nby_64 = (index_size + nty - 1) / nty;
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const int nby = FindNumBlocks('y', nby_64);
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const dim3 grid(nbx, nby);
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const dim3 block(ntx, nty);
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int64_t input_size = x.dims()[0];
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int block_ = 1024;
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if (reduce_op == "SUM" || reduce_op == "MEAN") {
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GraphSendUERecvSumCUDAFunctor<T> sum_functor;
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if (message_op == "ADD") {
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funcs::AddFunctor<T> add_funtor;
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GraphSendUERecvCUDAKernel<T,
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IndexT,
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GraphSendUERecvSumCUDAFunctor<T>,
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funcs::AddFunctor<T>>
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<<<grid, block, 0, dev_ctx.stream()>>>(
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x_data,
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e_data,
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s_index,
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d_index,
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thrust::raw_pointer_cast(x_bcastoff.data()),
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thrust::raw_pointer_cast(e_bcastoff.data()),
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out_data,
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index_size,
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bcast_info.l_len,
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bcast_info.r_len,
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out_len,
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bcast_info.use_bcast,
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add_funtor,
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sum_functor);
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} else if (message_op == "MUL") {
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funcs::MultiplyFunctor<T> mul_functor;
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GraphSendUERecvCUDAKernel<T,
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IndexT,
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GraphSendUERecvSumCUDAFunctor<T>,
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funcs::MultiplyFunctor<T>>
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<<<grid, block, 0, dev_ctx.stream()>>>(
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x_data,
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e_data,
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s_index,
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d_index,
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thrust::raw_pointer_cast(x_bcastoff.data()),
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thrust::raw_pointer_cast(e_bcastoff.data()),
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out_data,
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index_size,
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bcast_info.l_len,
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bcast_info.r_len,
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out_len,
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bcast_info.use_bcast,
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mul_functor,
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sum_functor);
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}
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if (reduce_op == "MEAN") {
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input_size = out_size <= 0 ? x.dims()[0] : out_size;
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dst_count->Resize({input_size});
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dev_ctx.template Alloc<int>(dst_count);
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int* dst_count_data = dst_count->data<int>();
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#ifdef PADDLE_WITH_HIP
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hipMemset(dst_count_data, 0, input_size * sizeof(int));
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#else
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cudaMemsetAsync(
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dst_count_data, 0, input_size * sizeof(int), dev_ctx.stream());
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#endif
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int64_t grid_count = (index_size + block_ - 1) / block_;
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PADDLE_ENFORCE_LE_UINT32_MAX(grid_count, "grid_count");
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ComputeCountCUDAKernel<T, IndexT>
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<<<static_cast<uint32_t>(grid_count), block_, 0, dev_ctx.stream()>>>(
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dst_count_data, d_index, index_size);
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int64_t grid_mean = (input_size * out_len + block_ - 1) / block_;
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int64_t max_grid_dimx = dev_ctx.GetCUDAMaxGridDimSize()[0];
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int64_t grid_mean_ =
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grid_mean < max_grid_dimx ? grid_mean : max_grid_dimx;
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ManipulateMeanCUDAKernel<T><<<grid_mean_, block_, 0, dev_ctx.stream()>>>(
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out_data, dst_count_data, input_size, out_len);
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}
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} else if (reduce_op == "MAX") {
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GraphSendUERecvMaxCUDAFunctor<T> max_functor;
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if (message_op == "ADD") {
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funcs::AddFunctor<T> add_funtor;
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GraphSendUERecvCUDAKernel<T,
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IndexT,
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GraphSendUERecvMaxCUDAFunctor<T>,
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funcs::AddFunctor<T>>
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<<<grid, block, 0, dev_ctx.stream()>>>(
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x_data,
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e_data,
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s_index,
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d_index,
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thrust::raw_pointer_cast(x_bcastoff.data()),
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thrust::raw_pointer_cast(e_bcastoff.data()),
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out_data,
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index_size,
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bcast_info.l_len,
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bcast_info.r_len,
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out_len,
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bcast_info.use_bcast,
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add_funtor,
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max_functor);
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} else if (message_op == "MUL") {
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funcs::MultiplyFunctor<T> mul_functor;
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GraphSendUERecvCUDAKernel<T,
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IndexT,
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GraphSendUERecvMaxCUDAFunctor<T>,
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funcs::MultiplyFunctor<T>>
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<<<grid, block, 0, dev_ctx.stream()>>>(
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x_data,
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e_data,
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s_index,
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d_index,
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thrust::raw_pointer_cast(x_bcastoff.data()),
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thrust::raw_pointer_cast(e_bcastoff.data()),
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out_data,
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index_size,
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bcast_info.l_len,
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bcast_info.r_len,
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out_len,
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bcast_info.use_bcast,
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mul_functor,
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max_functor);
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}
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if (out_size > 0) {
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input_size = out_size;
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}
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int64_t grid_max = (input_size * out_len + block_ - 1) / block_;
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int64_t max_grid_dimx = dev_ctx.GetCUDAMaxGridDimSize()[0];
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int64_t grid_max_ = grid_max < max_grid_dimx ? grid_max : max_grid_dimx;
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InputResetMaxCUDAKernel<T><<<grid_max_, block_, 0, dev_ctx.stream()>>>(
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out_data, input_size, out_len);
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} else if (reduce_op == "MIN") {
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GraphSendUERecvMinCUDAFunctor<T> min_functor;
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if (message_op == "ADD") {
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funcs::AddFunctor<T> add_funtor;
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GraphSendUERecvCUDAKernel<T,
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IndexT,
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GraphSendUERecvMinCUDAFunctor<T>,
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funcs::AddFunctor<T>>
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<<<grid, block, 0, dev_ctx.stream()>>>(
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x_data,
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e_data,
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s_index,
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d_index,
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thrust::raw_pointer_cast(x_bcastoff.data()),
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thrust::raw_pointer_cast(e_bcastoff.data()),
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out_data,
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index_size,
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bcast_info.l_len,
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bcast_info.r_len,
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out_len,
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bcast_info.use_bcast,
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add_funtor,
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min_functor);
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} else if (message_op == "MUL") {
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funcs::MultiplyFunctor<T> mul_functor;
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GraphSendUERecvCUDAKernel<T,
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IndexT,
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GraphSendUERecvMinCUDAFunctor<T>,
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funcs::MultiplyFunctor<T>>
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<<<grid, block, 0, dev_ctx.stream()>>>(
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x_data,
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e_data,
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s_index,
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d_index,
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thrust::raw_pointer_cast(x_bcastoff.data()),
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thrust::raw_pointer_cast(e_bcastoff.data()),
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out_data,
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index_size,
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bcast_info.l_len,
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bcast_info.r_len,
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out_len,
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bcast_info.use_bcast,
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mul_functor,
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min_functor);
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}
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if (out_size > 0) {
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input_size = out_size;
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}
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int64_t grid_min = (input_size * out_len + block_ - 1) / block_;
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int64_t max_grid_dimx = dev_ctx.GetCUDAMaxGridDimSize()[0];
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int64_t grid_min_ = grid_min < max_grid_dimx ? grid_min : max_grid_dimx;
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InputResetMinCUDAKernel<T><<<grid_min_, block_, 0, dev_ctx.stream()>>>(
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out_data, input_size, out_len);
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}
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}
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template <typename T, typename Context>
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void SendUERecvKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& y,
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const DenseTensor& src_index,
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const DenseTensor& dst_index,
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const std::string& message_op,
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const std::string& reduce_op,
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const IntArray& out_size,
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DenseTensor* out,
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DenseTensor* dst_count) {
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auto index_type = src_index.dtype();
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auto& out_size_data = out_size.GetData();
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if (x.numel() == 0 || y.numel() == 0 || src_index.numel() == 0 ||
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dst_index.numel() == 0) {
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std::vector<int64_t> dims_ = vectorize(out->dims());
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if (out_size_data[0] <= 0) {
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dims_[0] = x.dims()[0];
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} else {
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dims_[0] = out_size_data[0];
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}
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if (reduce_op == "MEAN") {
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int64_t input_size =
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out_size_data[0] <= 0 ? x.dims()[0] : out_size_data[0];
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dst_count->Resize({input_size});
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}
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out->Resize(dims_);
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Full<T, Context>(dev_ctx, out->dims(), 0, out);
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Full<int, Context>(dev_ctx, dst_count->dims(), 0, dst_count);
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return;
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}
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if (index_type == DataType::INT32) {
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GraphSendUERecvOpCUDAKernelLaunchHelper<Context, T, int32_t>(
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dev_ctx,
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x,
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y,
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src_index,
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dst_index,
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message_op,
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reduce_op,
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out_size_data[0],
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out,
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dst_count);
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} else if (index_type == DataType::INT64) {
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GraphSendUERecvOpCUDAKernelLaunchHelper<Context, T, int64_t>(
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dev_ctx,
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x,
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y,
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src_index,
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dst_index,
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message_op,
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reduce_op,
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out_size_data[0],
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out,
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dst_count);
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(send_ue_recv,
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GPU,
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ALL_LAYOUT,
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phi::SendUERecvKernel,
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float,
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double,
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int,
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int64_t,
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phi::float16) {
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kernel->OutputAt(1).SetDataType(phi::DataType::INT32);
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}
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