98 lines
3.0 KiB
Plaintext
98 lines
3.0 KiB
Plaintext
// Copyright (c) 2023 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/number_count_kernel.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/backends/gpu/gpu_primitives.h"
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#include "paddle/phi/core/kernel_registry.h"
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namespace phi {
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#define CEIL(_x_, _y_) (((_x_)-1) / (_y_) + 1)
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#define PERTHREAD_EXPERTS 256
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#define WARP_SIZE 32
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const int CUDA_NUM_THREADS = 512;
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static inline int GET_BLOCKS(const int N) {
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return (N + CUDA_NUM_THREADS - 1) / CUDA_NUM_THREADS;
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}
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template <typename T>
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__global__ void initialize_zero_kernel(T* data, const int length) {
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CUDA_KERNEL_LOOP(idx, length) { data[idx] = static_cast<T>(0); }
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}
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template <typename T>
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__global__ void NumberCount(const T* numbers,
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T* number_count,
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int64_t batch_size,
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int upper_range) {
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int res_tmp[PERTHREAD_EXPERTS] = {0};
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int expert_min = blockIdx.x * PERTHREAD_EXPERTS;
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int expert_max = expert_min + PERTHREAD_EXPERTS;
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if (expert_max > upper_range) {
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expert_max = upper_range;
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}
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for (int64_t i = threadIdx.x; i < batch_size; i += blockDim.x) {
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T idx = numbers[i];
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if (idx == -1) {
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continue;
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}
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if (idx < expert_min || idx >= expert_max) {
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continue;
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}
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res_tmp[idx - expert_min] += 1;
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}
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for (int i = expert_min; i < expert_max; ++i) {
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int x = res_tmp[i - expert_min];
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#pragma unroll
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for (int j = 1; j < WARP_SIZE; j <<= 1) {
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#ifdef __HIPCC__
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x = x + __shfl_down(x, j);
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#else
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x = x + __shfl_down_sync(-1u, x, j);
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#endif
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}
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if (threadIdx.x % WARP_SIZE == 0) {
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CudaAtomicAdd(number_count + i, x);
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}
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}
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}
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template <typename T, typename Context>
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void NumberCountKernel(const Context& dev_ctx,
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const DenseTensor& numbers,
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int upper_range,
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DenseTensor* out) {
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int64_t batch_size = numbers.numel();
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DDim out_dims = make_ddim({upper_range});
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out->Resize(out_dims);
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auto out_data = dev_ctx.template Alloc<T>(out);
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const T* gate_data = numbers.data<T>();
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initialize_zero_kernel<T>
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<<<GET_BLOCKS(upper_range), CUDA_NUM_THREADS, 0, dev_ctx.stream()>>>(
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out_data, upper_range);
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NumberCount<T>
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<<<CEIL(upper_range, PERTHREAD_EXPERTS), 256, 0, dev_ctx.stream()>>>(
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gate_data, out_data, batch_size, upper_range);
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}
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} // namespace phi
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PD_REGISTER_KERNEL(
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number_count, GPU, ALL_LAYOUT, phi::NumberCountKernel, int64_t) {}
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