wehub-resource-sync
115 lines
3.9 KiB
Plaintext
115 lines
3.9 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/norm_grad_kernel.h"
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#include <algorithm>
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/common/amp_type_traits.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/common_shape.h"
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#include "paddle/phi/kernels/funcs/cub.h"
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namespace phi {
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template <typename T, int BlockDim>
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__global__ void NormalizeGradient(const T* x,
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const T* x_norm,
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const T* y_grad,
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const int64_t pre,
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const int axis_n,
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const int64_t post,
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T* x_grad) {
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using MT = typename MPTypeTrait<T>::Type;
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typedef cub::BlockReduce<MT, BlockDim> BlockReduce;
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__shared__ typename BlockReduce::TempStorage temp_storage_sum;
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int64_t num = pre * post;
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for (int64_t i = blockIdx.x; i < num; i += gridDim.x) {
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MT sum = 0.0;
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__shared__ MT row_sum;
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__shared__ MT row_sqrt_norm;
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__shared__ MT row_norm;
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auto base = (i / post) * post * axis_n + (i % post);
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for (int j = threadIdx.x; j < axis_n; j += blockDim.x) {
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int64_t index = base + j * post;
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sum += static_cast<MT>(x[index]) * static_cast<MT>(y_grad[index]);
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}
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MT reduce_result = BlockReduce(temp_storage_sum).Sum(sum);
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if (threadIdx.x == 0) {
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row_sum = reduce_result;
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row_sqrt_norm = static_cast<MT>(x_norm[i]);
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row_norm = row_sqrt_norm * row_sqrt_norm;
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}
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__syncthreads();
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for (int j = threadIdx.x; j < axis_n; j += blockDim.x) {
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int64_t index = base + j * post;
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const MT x_ij = static_cast<MT>(x[index]);
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const MT dy_ij = static_cast<MT>(y_grad[index]);
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x_grad[index] =
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static_cast<T>((dy_ij - x_ij * row_sum / row_norm) / row_sqrt_norm);
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}
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}
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}
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template <typename T, typename Context>
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void NormGradKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& norm,
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const DenseTensor& out_grad,
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int axis,
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float epsilon,
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bool is_test,
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DenseTensor* x_grad) {
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auto* in_x = &x;
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auto* in_norm = &norm;
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auto* in_dy = &out_grad;
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auto* out_dx = x_grad;
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dev_ctx.template Alloc<T>(out_dx);
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T* dx = out_dx->data<T>();
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const T* x_data = in_x->data<T>();
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const T* x_norm = in_norm->data<T>();
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const T* dy = in_dy->data<T>();
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auto xdim = in_x->dims();
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if (axis < 0) axis = xdim.size() + axis;
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int64_t pre, n, post;
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funcs::GetPrePostNumel(xdim, axis, &pre, &n, &post);
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// Handle zero-size tensor: skip kernel launch to avoid invalid CUDA config
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if (pre * post == 0) {
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return;
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}
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const int block = 512;
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int max_threads = dev_ctx.GetMaxPhysicalThreadCount();
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const int64_t max_blocks = std::max(max_threads / block, 1);
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int grid = std::min(max_blocks, pre * post);
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NormalizeGradient<T, block><<<grid, block, 0, dev_ctx.stream()>>>(
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x_data, x_norm, dy, pre, n, post, dx);
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}
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} // namespace phi
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PD_REGISTER_KERNEL(norm_grad,
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GPU,
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ALL_LAYOUT,
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phi::NormGradKernel,
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float,
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double,
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phi::float16,
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phi::bfloat16) {}
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