wehub-resource-sync
468 lines
20 KiB
Plaintext
468 lines
20 KiB
Plaintext
// Copyright (c) 2025 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/index_elementwise_put_grad_kernel.h"
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#include <iostream>
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/backends/gpu/gpu_launch_config.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/cast_kernel.h"
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#include "paddle/phi/kernels/full_kernel.h"
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#include "paddle/phi/kernels/funcs/index_elementwise.cu.h"
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#include "paddle/phi/kernels/funcs/index_put_utils.h"
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#include "paddle/phi/kernels/funcs/stride_utils.h"
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#include "paddle/phi/kernels/reduce_sum_kernel.h"
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namespace phi {
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template <typename T, typename IndexT = int, typename OffsetT = uint32_t>
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void GPUIndexElementwisePutGradKernel(
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const GPUContext& dev_ctx,
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const DenseTensor& out_grad,
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const std::vector<const DenseTensor*>& index,
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const std::vector<int64_t>& input_dims,
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const std::vector<int64_t>& input_strides,
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const std::vector<int64_t>& index_dims,
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const std::vector<int64_t>& index_strides,
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const int64_t slice_offset,
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DenseTensor* x_grad,
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DenseTensor* value_grad) {
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int64_t numel = 0;
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int64_t num_indices = 0;
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std::vector<int64_t> shape_tmp;
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std::vector<int64_t> stride_tmp;
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funcs::cal_shape_stride(index_dims, &num_indices, &shape_tmp, &stride_tmp);
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auto sizes = std::array<int64_t, DDim::kMaxRank + 1>{};
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auto strides = std::array<int64_t, DDim::kMaxRank + 1>{};
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for (int64_t i = 0; i < num_indices; i++) {
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sizes[i] = index_dims[i];
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strides[i] = index_strides[i];
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}
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std::array<int64_t*, 3> strides_array;
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std::vector<int64_t> desired_shape;
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std::array<std::vector<int64_t>, 3> strides_vec;
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std::vector<int64_t> value_dims;
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std::vector<int64_t> value_strides;
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// default value_ele_size when value_grad is nullptr
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int64_t value_ele_size = 4;
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if (value_grad) {
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value_dims = vectorize<int64_t>(value_grad->dims());
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value_strides = vectorize<int64_t>(value_grad->strides());
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value_ele_size = SizeOf(value_grad->dtype());
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}
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funcs::IndexPutStride<3>(input_dims,
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input_strides,
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SizeOf(out_grad.dtype()),
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value_dims,
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value_strides,
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value_ele_size,
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shape_tmp,
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stride_tmp,
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SizeOf(index[0]->dtype()),
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&desired_shape,
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&strides_array,
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&numel,
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strides_vec);
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auto offset_calc = funcs::make_offset_calculator_put<3, false, OffsetT>(
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desired_shape, strides_array);
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const int64_t N = numel;
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constexpr int nt = 128;
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constexpr int vt = 4;
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const dim3 block(nt);
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const dim3 grid((N + block.x * vt - 1) / (block.x * vt));
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auto stream = dev_ctx.stream();
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using dtype = funcs::OpaqueType<sizeof(T)>;
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if (!value_grad) {
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char* out_ptr = reinterpret_cast<char*>(x_grad->data<T>());
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if (index.size() == 1 && index[0]->dtype() == DataType::BOOL) {
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const bool* mask_data = index[0]->data<bool>();
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funcs::index_elementwise_with_tensor_kernel<nt, vt>
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<<<grid, block, 0, stream>>>(N, [=] __device__(int64_t idx) {
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const auto offsets = offset_calc.get(idx);
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char* const out_data = out_ptr + offsets[0] + slice_offset;
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if (mask_data[idx]) {
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*reinterpret_cast<T*>(out_data) = T(0);
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}
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});
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} else {
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auto index_ptrs = funcs::GetIndexDataPtrs<IndexT>(index);
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funcs::index_elementwise_with_tensor_kernel<nt, vt>
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<<<grid, block, 0, stream>>>(N, [=] __device__(int64_t idx) {
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const auto offsets = offset_calc.get(idx);
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char* const out_data = out_ptr + offsets[0] + slice_offset;
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int64_t offset = 0;
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#pragma unroll
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for (int64_t i = 0; i < num_indices; i++) {
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int64_t index =
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*reinterpret_cast<int64_t*>(index_ptrs[i] + offsets[2]);
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if (index < 0) {
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index += sizes[i];
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}
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offset += index * strides[i];
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}
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T num = T(0);
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*reinterpret_cast<dtype*>(out_data + offset) =
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*reinterpret_cast<dtype*>(&num);
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});
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}
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} else if (!x_grad) {
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auto index_ptrs = funcs::GetIndexDataPtrs<IndexT>(index);
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const char* out_ptr = reinterpret_cast<const char*>(out_grad.data<T>());
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char* value_ptr = reinterpret_cast<char*>(value_grad->data<T>());
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PADDLE_ENFORCE_EQ(true,
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funcs::IsInUint32Range(value_grad->numel()),
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common::errors::PreconditionNotMet(
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"the numel of input or output should be in [0, "
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"std::numeric_limits<int32_t>::max()]"));
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funcs::index_elementwise_with_tensor_kernel<nt, vt>
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<<<grid, block, 0, stream>>>(N, [=] __device__(int64_t idx) {
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const auto offsets = offset_calc.get(idx);
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const char* const out_data = out_ptr + offsets[0] + slice_offset;
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char* const value_data = value_ptr + offsets[1];
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int64_t offset = 0;
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#pragma unroll
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for (int64_t i = 0; i < num_indices; i++) {
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int64_t index =
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*reinterpret_cast<int64_t*>(index_ptrs[i] + offsets[2]);
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if (index < 0) {
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index += sizes[i];
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}
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offset += index * strides[i];
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}
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*reinterpret_cast<dtype*>(value_data) =
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*reinterpret_cast<const dtype*>(out_data + offset);
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});
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} else {
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auto index_ptrs = funcs::GetIndexDataPtrs<IndexT>(index);
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char* out_ptr = reinterpret_cast<char*>(x_grad->data<T>());
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PADDLE_ENFORCE_EQ(true,
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funcs::IsInUint32Range(value_grad->numel()),
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common::errors::PreconditionNotMet(
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"the numel of input or output should be in [0, "
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"std::numeric_limits<int32_t>::max()]"));
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char* value_ptr = reinterpret_cast<char*>(value_grad->data<T>());
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funcs::index_elementwise_with_tensor_kernel<nt, vt>
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<<<grid, block, 0, stream>>>(N, [=] __device__(int64_t idx) {
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const auto offsets = offset_calc.get(idx);
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char* const out_data = out_ptr + offsets[0] + slice_offset;
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char* const value_data = value_ptr + offsets[1];
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int64_t offset = 0;
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#pragma unroll
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for (int64_t i = 0; i < num_indices; i++) {
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int64_t index =
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*reinterpret_cast<int64_t*>(index_ptrs[i] + offsets[2]);
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if (index < 0) {
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index += sizes[i];
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}
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offset += index * strides[i];
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}
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T num = T(0);
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*reinterpret_cast<dtype*>(value_data) =
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*reinterpret_cast<dtype*>(out_data + offset);
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*reinterpret_cast<dtype*>(out_data + offset) =
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*reinterpret_cast<dtype*>(&num);
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});
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}
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}
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template <typename T, typename Context, typename OffsetT = uint32_t>
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void LaunchIndexElementwisePutWithTensorGradCudaKernel(
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const Context& dev_ctx,
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const std::vector<const DenseTensor*>& indices,
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const DenseTensor& out_grad,
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const std::vector<int64_t>& input_dims,
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const std::vector<int64_t>& input_strides,
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const std::vector<int64_t>& index_dims,
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const std::vector<int64_t>& index_strides,
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const int64_t slice_offset,
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DenseTensor* value_grad,
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DenseTensor* x_grad) {
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if (x_grad && !value_grad) {
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Copy(dev_ctx, out_grad, dev_ctx.GetPlace(), false, x_grad);
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GPUIndexElementwisePutGradKernel<T, int64_t, OffsetT>(dev_ctx,
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out_grad,
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indices,
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input_dims,
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input_strides,
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index_dims,
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index_strides,
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slice_offset,
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x_grad,
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value_grad);
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} else if (value_grad) {
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if (x_grad) {
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Copy(dev_ctx, out_grad, dev_ctx.GetPlace(), false, x_grad);
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}
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if (value_grad->numel() == 1) {
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DenseTensor tmp_value_grad(value_grad->dtype());
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tmp_value_grad.Resize(input_dims);
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dev_ctx.template Alloc<T>(&tmp_value_grad);
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GPUIndexElementwisePutGradKernel<T, int64_t, OffsetT>(dev_ctx,
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out_grad,
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indices,
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input_dims,
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input_strides,
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index_dims,
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index_strides,
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slice_offset,
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x_grad,
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&tmp_value_grad);
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std::vector<int> v_dims(tmp_value_grad.dims().size());
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std::iota(v_dims.begin(), v_dims.end(), 0);
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IntArray v_axis(v_dims);
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SumKernel<T, Context>(dev_ctx,
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tmp_value_grad,
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v_axis,
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value_grad->dtype(),
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false,
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value_grad);
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} else if (value_grad->dims() == make_ddim(input_dims)) {
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dev_ctx.template Alloc<T>(value_grad);
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GPUIndexElementwisePutGradKernel<T, int64_t, OffsetT>(dev_ctx,
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out_grad,
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indices,
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input_dims,
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input_strides,
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index_dims,
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index_strides,
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slice_offset,
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x_grad,
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value_grad);
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} else {
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DenseTensor tmp_value_grad(value_grad->dtype());
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tmp_value_grad.Resize(input_dims);
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dev_ctx.template Alloc<T>(&tmp_value_grad);
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GPUIndexElementwisePutGradKernel<T, int64_t, OffsetT>(dev_ctx,
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out_grad,
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indices,
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input_dims,
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input_strides,
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index_dims,
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index_strides,
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slice_offset,
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x_grad,
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&tmp_value_grad);
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std::vector<int64_t> after_dims = vectorize(tmp_value_grad.dims());
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std::vector<int64_t> before_dims = vectorize(value_grad->dims());
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std::vector<int64_t> compress_dims;
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std::vector<int64_t> dims_without_1;
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funcs::CalCompressedDimsWith1AndWithout1(
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&after_dims, &before_dims, &compress_dims, &dims_without_1);
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auto pre_dims = value_grad->dims();
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value_grad->Resize(dims_without_1);
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IntArray v_axis(compress_dims);
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SumKernel<T, Context>(dev_ctx,
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tmp_value_grad,
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v_axis,
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value_grad->dtype(),
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false,
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value_grad);
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value_grad->Resize(pre_dims);
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}
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}
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}
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template <typename T, typename Context>
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void LaunchIndexElementwisePutGradCudaKernel(
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const Context& dev_ctx,
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const std::vector<const DenseTensor*>& indices,
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const DenseTensor& out_grad,
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const std::vector<int64_t>& input_dims,
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const std::vector<int64_t>& input_strides,
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const std::vector<int64_t>& index_dims,
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const std::vector<int64_t>& index_strides,
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const int64_t slice_offset,
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DenseTensor* x_grad) {
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if (x_grad) {
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Copy(dev_ctx, out_grad, dev_ctx.GetPlace(), false, x_grad);
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if (funcs::IsInUint32Range(x_grad->numel() * sizeof(T),
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out_grad.numel() * sizeof(T))) {
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GPUIndexElementwisePutGradKernel<T, int64_t>(dev_ctx,
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out_grad,
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indices,
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input_dims,
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input_strides,
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index_dims,
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index_strides,
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slice_offset,
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x_grad,
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nullptr);
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} else {
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GPUIndexElementwisePutGradKernel<T, int64_t, uint64_t>(dev_ctx,
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out_grad,
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indices,
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input_dims,
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input_strides,
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index_dims,
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index_strides,
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slice_offset,
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x_grad,
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nullptr);
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}
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}
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}
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template <typename T, typename Context>
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void IndexElementwisePutGradKernel(
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const Context& dev_ctx,
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const DenseTensor& x,
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const std::vector<const DenseTensor*>& indices,
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const DenseTensor& out_grad,
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const std::vector<int64_t>& input_dims,
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const std::vector<int64_t>& input_strides,
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const std::vector<int64_t>& index_dims,
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const std::vector<int64_t>& index_strides,
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const int64_t slice_offset,
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DenseTensor* x_grad) {
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const auto& index_type = indices[0]->dtype();
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PADDLE_ENFORCE_EQ(index_type == DataType::INT64 ||
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(index_type == DataType::BOOL && indices.size() == 1),
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true,
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common::errors::InvalidArgument(
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"Index holds the wrong type, it holds [%s], but "
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"desires to be [%s].",
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index_type,
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DataType::INT64));
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std::vector<DenseTensor> tmp_args;
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if (indices.empty()) {
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if (x_grad) {
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Copy(dev_ctx, out_grad, dev_ctx.GetPlace(), false, x_grad);
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}
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return;
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}
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LaunchIndexElementwisePutGradCudaKernel<T, Context>(dev_ctx,
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indices,
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out_grad,
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input_dims,
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input_strides,
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index_dims,
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index_strides,
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slice_offset,
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x_grad);
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}
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template <typename T, typename Context>
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void IndexElementwisePutWithTensorGradKernel(
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const Context& dev_ctx,
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const DenseTensor& x,
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const std::vector<const DenseTensor*>& indices,
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const DenseTensor& value,
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const DenseTensor& out_grad,
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const std::vector<int64_t>& input_dims,
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const std::vector<int64_t>& input_strides,
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const std::vector<int64_t>& index_dims,
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const std::vector<int64_t>& index_strides,
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const int64_t slice_offset,
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DenseTensor* x_grad,
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DenseTensor* value_grad) {
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const auto& index_type = indices[0]->dtype();
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PADDLE_ENFORCE_EQ(index_type == DataType::INT64,
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true,
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common::errors::InvalidArgument(
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"Index holds the wrong type, it holds [%s], but "
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"desires to be [%s].",
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index_type,
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DataType::INT64));
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std::vector<DenseTensor> tmp_args;
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if (indices.empty()) {
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if (x_grad) {
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Copy(dev_ctx, out_grad, dev_ctx.GetPlace(), false, x_grad);
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}
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if (value_grad) {
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Full<T, Context>(dev_ctx, value_grad->dims(), 0.0f, value_grad);
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}
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return;
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}
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if (x_grad && funcs::IsInUint32Range(x_grad->numel() * sizeof(T),
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out_grad.numel() * sizeof(T))) {
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LaunchIndexElementwisePutWithTensorGradCudaKernel<T, Context>(dev_ctx,
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indices,
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out_grad,
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input_dims,
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input_strides,
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index_dims,
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index_strides,
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slice_offset,
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value_grad,
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x_grad);
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} else {
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LaunchIndexElementwisePutWithTensorGradCudaKernel<T, Context, uint64_t>(
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dev_ctx,
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indices,
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out_grad,
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input_dims,
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input_strides,
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index_dims,
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index_strides,
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slice_offset,
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value_grad,
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x_grad);
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(index_elementwise_put_grad,
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GPU,
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ALL_LAYOUT,
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phi::IndexElementwisePutGradKernel,
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bool,
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float,
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double,
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int,
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int8_t,
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int64_t,
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int16_t,
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uint8_t,
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phi::float16,
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phi::bfloat16,
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phi::complex64,
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phi::complex128) {}
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PD_REGISTER_KERNEL(index_elementwise_put_with_tensor_grad,
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GPU,
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ALL_LAYOUT,
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phi::IndexElementwisePutWithTensorGradKernel,
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bool,
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float,
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double,
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int,
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int8_t,
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int64_t,
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int16_t,
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uint8_t,
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phi::float16,
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phi::bfloat16,
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phi::complex64,
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phi::complex128) {}
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