wehub-resource-sync
252 lines
9.3 KiB
C++
252 lines
9.3 KiB
C++
// Copyright (c) 2025 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#ifdef PADDLE_WITH_FLASHATTN_V3
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#include "paddle/phi/backends/dynload/flashattnv3.h"
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#include "paddle/phi/backends/dynload/flashmaskv2.h"
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#endif
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#include "paddle/phi/core/dense_tensor.h"
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#include "paddle/phi/core/platform/device_context.h"
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namespace phi {
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#ifdef PADDLE_WITH_FLASHATTN_V3
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#define CHECK_DEVICE(x) \
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PADDLE_ENFORCE_EQ( \
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x.place().GetType(), \
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AllocationType::GPU, \
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common::errors::InvalidArgument(#x " must be on CUDA Device"))
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#define CHECK_SHAPE(x, ...) \
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PADDLE_ENFORCE_EQ(x.dims(), \
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make_ddim({__VA_ARGS__}), \
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common::errors::InvalidArgument( \
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#x " must have shape (" #__VA_ARGS__ ")"))
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#define CHECK_CONTIGUOUS(x) \
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PADDLE_ENFORCE_EQ(x.meta().is_contiguous(), \
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true, \
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common::errors::InvalidArgument(#x " must be contiguous"))
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Flash_fwd_params *get_flash_fwd_params_handle();
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Flash_bwd_params *get_flash_bwd_params_handle();
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FlashMask_fwd_params *get_flashmask_fwd_params_handle();
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FlashMask_bwd_params *get_flashmask_bwd_params_handle();
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inline int get_max_headdim() {
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#ifndef FLASHATTENTION_DISABLE_HDIM256
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return 256;
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#endif
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#ifndef FLASHATTENTION_DISABLE_HDIM192
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return 192;
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#endif
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#ifndef FLASHATTENTION_DISABLE_HDIM128
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return 128;
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#endif
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#ifndef FLASHATTENTION_DISABLE_HDIM96
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return 96;
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#endif
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#ifndef FLASHATTENTION_DISABLE_HDIM64
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return 64;
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#endif
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return 0;
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}
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inline int flashmaskv2_get_max_headdim() { return 256; }
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inline int round_up_headdim(int head_size) {
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#ifndef FLASHATTENTION_DISABLE_HDIM64
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if (head_size <= 64) {
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return 64;
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}
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#endif
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#ifndef FLASHATTENTION_DISABLE_HDIM96
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if (head_size <= 96) {
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return 96;
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}
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#endif
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#ifndef FLASHATTENTION_DISABLE_HDIM128
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if (head_size <= 128) {
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return 128;
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}
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#endif
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#ifndef FLASHATTENTION_DISABLE_HDIM192
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if (head_size <= 192) {
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return 192;
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}
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#endif
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#ifndef FLASHATTENTION_DISABLE_HDIM256
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if (head_size <= 256) {
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return 256;
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}
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#endif
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return 256;
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}
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inline int flashmaskv2_round_up_headdim(int head_size) {
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#ifndef FLASHATTENTION_DISABLE_HDIM64
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if (head_size <= 64) {
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return 64;
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}
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#endif
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#ifndef FLASHATTENTION_DISABLE_HDIM128
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if (head_size <= 128) {
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return 128;
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}
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#endif
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return 256;
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}
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void set_params_fprop(Flash_fwd_params *params_handle,
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// sizes
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const size_t b,
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const size_t seqlen_q,
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const size_t seqlen_k,
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const size_t seqlen_q_rounded,
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const size_t seqlen_k_rounded,
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const size_t h,
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const size_t h_k,
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const size_t d,
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const size_t d_rounded,
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// device pointers
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const DenseTensor &q,
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const DenseTensor &k,
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const DenseTensor &v,
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const DenseTensor *out,
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void *cu_seqlens_q_d,
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void *cu_seqlens_k_d,
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void *seqused_q,
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void *seqused_k,
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void *softmax_lse_d,
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float p_dropout,
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float softmax_scale,
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int window_size_left,
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int window_size_right,
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const gpuDeviceProp &dprops,
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const float softcap = 0.f,
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const int sm_margin = 0);
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void set_params_dgrad(Flash_bwd_params *params_handle,
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// sizes
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const size_t b,
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const size_t seqlen_q,
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const size_t seqlen_k,
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const size_t seqlen_q_rounded,
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const size_t seqlen_k_rounded,
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const size_t h,
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const size_t h_k,
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const size_t d,
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const size_t d_rounded,
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// device pointers
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const DenseTensor &q,
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const DenseTensor &k,
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const DenseTensor &v,
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const DenseTensor &out,
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const DenseTensor &dout,
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DenseTensor *dq,
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DenseTensor *dk,
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DenseTensor *dv,
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void *cu_seqlens_q_d,
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void *cu_seqlens_k_d,
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void *seqused_q,
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void *seqused_k,
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void *dq_accum_d,
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void *dk_accum_d,
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void *dv_accum_d,
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void *softmax_lse_d,
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void *dsoftmax_sum_d,
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float p_dropout,
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float softmax_scale,
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int window_size_left,
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int window_size_right,
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const gpuDeviceProp &dprops,
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const float softcap = 0.f,
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bool deterministic = false,
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int const sm_margin = 0);
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void set_flashmaskv2_params_fprop(Flash_fwd_params *params_handle,
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// sizes
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const size_t b,
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const size_t seqlen_q,
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const size_t seqlen_k,
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const size_t seqlen_q_rounded,
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const size_t seqlen_k_rounded,
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const size_t h,
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const size_t h_k,
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const size_t d,
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const size_t d_rounded,
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// device pointers
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const DenseTensor &q,
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const DenseTensor &k,
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const DenseTensor &v,
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const DenseTensor *out,
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void *cu_seqlens_q_d,
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void *cu_seqlens_k_d,
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void *seqused_q,
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void *seqused_k,
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void *softmax_lse_d,
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float p_dropout,
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float softmax_scale,
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int window_size_left,
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int window_size_right,
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const gpuDeviceProp &dprops,
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const float softcap = 0.f,
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const int sm_margin = 0);
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void set_flashmaskv2_params_dgrad(Flash_bwd_params *params_handle,
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// sizes
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const size_t b,
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const size_t seqlen_q,
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const size_t seqlen_k,
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const size_t seqlen_q_rounded,
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const size_t seqlen_k_rounded,
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const size_t h,
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const size_t h_k,
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const size_t d,
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const size_t d_rounded,
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// device pointers
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const DenseTensor &q,
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const DenseTensor &k,
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const DenseTensor &v,
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const DenseTensor &out,
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const DenseTensor &dout,
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DenseTensor *dq,
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DenseTensor *dk,
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DenseTensor *dv,
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void *cu_seqlens_q_d,
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void *cu_seqlens_k_d,
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void *seqused_q,
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void *seqused_k,
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void *dq_accum_d,
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void *dk_accum_d,
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void *dv_accum_d,
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void *softmax_lse_d,
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void *dsoftmax_sum_d,
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float p_dropout,
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float softmax_scale,
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int window_size_left,
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int window_size_right,
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const gpuDeviceProp &dprops,
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const float softcap = 0.f,
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bool deterministic = false,
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int const sm_margin = 0);
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#endif
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} // namespace phi
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