179 lines
6.4 KiB
Plaintext
179 lines
6.4 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include "paddle/phi/kernels/affine_grid_grad_kernel.h"
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#include "glog/logging.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/backends/gpu/gpu_device_function.h"
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#include "paddle/phi/backends/gpu/gpu_primitives.h"
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#include "paddle/phi/common/int_array.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/bmm_kernel.h"
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#include "paddle/phi/kernels/full_kernel.h"
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#include "paddle/phi/kernels/funcs/affine_grid_utils.h"
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#include "paddle/phi/kernels/transpose_kernel.h"
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namespace phi {
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template <typename T, typename Context>
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void AffineGridGrad4DCUDAKernel(const Context& dev_ctx,
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const DenseTensor& output_grad,
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const IntArray& outputShape,
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bool align_corners,
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DenseTensor* input_grad) {
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// The shape of the output grad is [N, H, W, 2]
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auto grad_grid_dims = output_grad.dims();
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int64_t n = grad_grid_dims[0];
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int64_t h = grad_grid_dims[1];
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int64_t w = grad_grid_dims[2];
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// The shape of input_grad (theta gradient) should be [N, 2, 3]
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input_grad->Resize({n, 2, 3});
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T* grad_theta_data = dev_ctx.template Alloc<T>(input_grad);
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if (output_grad.numel() == 0) {
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Full<T, Context>(dev_ctx, input_grad->dims(), 0, input_grad);
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return;
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}
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// 1. Directly create the basic grid using the same kernel as the forward
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// direction
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DenseTensor base_grid;
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base_grid.Resize({n, h, w, 3});
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T* base_grid_data = dev_ctx.template Alloc<T>(&base_grid);
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funcs::CreateBaseGridKernel_4D<T, Context>(
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dev_ctx, base_grid_data, n, h, w, align_corners);
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// 2. Reshaping base_grid to [N, H * W, 3]
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DenseTensor base_grid_reshaped;
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base_grid_reshaped.ShareDataWith(base_grid);
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base_grid_reshaped.Resize({n, h * w, 3});
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// 3. Transposition base_grid: [N, H * W, 3] ->[N, 3, H * W]
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DenseTensor base_grid_transposed;
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base_grid_transposed.Resize({n, 3, h * w});
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TransposeKernel<T, Context>(
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dev_ctx, base_grid_reshaped, {0, 2, 1}, &base_grid_transposed);
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// 4. Reshaping Output_grad to [N, H * W, 2]
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DenseTensor grad_grid_reshaped;
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grad_grid_reshaped.ShareDataWith(output_grad);
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grad_grid_reshaped.Resize({n, h * w, 2});
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// 5. Batch matrix multiplication: [N, 3, H * W] x [N, H * W, 2]=[N, 3, 2]
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DenseTensor grad_theta_temp;
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grad_theta_temp.Resize({n, 3, 2});
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BmmKernel<T, Context>(
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dev_ctx, base_grid_transposed, grad_grid_reshaped, &grad_theta_temp);
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// 6. Transposition yields the final result: [N, 3, 2] ->[N, 2, 3]
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TransposeKernel<T, Context>(dev_ctx, grad_theta_temp, {0, 2, 1}, input_grad);
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}
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template <typename T, typename Context>
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void AffineGridGrad5DCUDAKernel(const Context& dev_ctx,
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const DenseTensor& output_grad,
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const IntArray& outputShape,
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bool align_corners,
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DenseTensor* input_grad) {
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// The shape of the output grad is [N, D, H, W, 3]
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auto grad_grid_dims = output_grad.dims();
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int64_t n = grad_grid_dims[0];
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int64_t d = grad_grid_dims[1];
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int64_t h = grad_grid_dims[2];
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int64_t w = grad_grid_dims[3];
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// The shape of input_grad (theta gradient) should be [N, 3, 4]
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input_grad->Resize({n, 3, 4});
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T* grad_theta_data = dev_ctx.template Alloc<T>(input_grad);
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if (output_grad.numel() == 0) {
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Full<T, Context>(dev_ctx, input_grad->dims(), 0, input_grad);
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return;
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}
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// 1. Directly create the basic grid using the same kernel as the forward
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// direction
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DenseTensor base_grid;
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base_grid.Resize({n, d, h, w, 4});
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T* base_grid_data = dev_ctx.template Alloc<T>(&base_grid);
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funcs::CreateBaseGridKernel_5D<T, Context>(
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dev_ctx, base_grid_data, n, d, h, w, align_corners);
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// 2. Reshaping base_grid to [N, D * H * W, 4]
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DenseTensor base_grid_reshaped;
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base_grid_reshaped.ShareDataWith(base_grid);
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base_grid_reshaped.Resize({n, d * h * w, 4});
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// 3. Transpose base_grid:[N,D*H*W,4]->[N,4,D*H*W]
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DenseTensor base_grid_transposed;
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base_grid_transposed.Resize({n, 4, d * h * w});
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TransposeKernel<T, Context>(
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dev_ctx, base_grid_reshaped, {0, 2, 1}, &base_grid_transposed);
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// 4. Reshaping Output_grad to [N, D * H * W, 3]
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DenseTensor grad_grid_reshaped;
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grad_grid_reshaped.ShareDataWith(output_grad);
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grad_grid_reshaped.Resize({n, d * h * w, 3});
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// 5. Batch matrix multiplication: [N, 4, D * H * W] x [N, D * H * W, 3]=[N,
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// 4, 3]
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DenseTensor grad_theta_temp;
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grad_theta_temp.Resize({n, 4, 3});
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BmmKernel<T, Context>(
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dev_ctx, base_grid_transposed, grad_grid_reshaped, &grad_theta_temp);
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// 6. Transposition yields the final result: [N, 4, 3] ->[N, 3, 4]
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TransposeKernel<T, Context>(dev_ctx, grad_theta_temp, {0, 2, 1}, input_grad);
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}
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template <typename T, typename Context>
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void AffineGridGradCUDAKernel(const Context& dev_ctx,
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const DenseTensor& input,
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const IntArray& outputShape,
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bool align_corners,
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DenseTensor* output) {
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auto* theta = &input;
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auto theta_size = theta->dims().size();
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if (output->numel() == 0 || input.numel() == 0) {
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dev_ctx.template Alloc<T>(output);
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funcs::SetConstant<GPUContext, T>()(dev_ctx, output, static_cast<T>(0));
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return;
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}
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if (theta_size == 4) {
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AffineGridGrad4DCUDAKernel<T, Context>(
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dev_ctx, input, outputShape, align_corners, output);
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} else {
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AffineGridGrad5DCUDAKernel<T, Context>(
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dev_ctx, input, outputShape, align_corners, output);
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(affine_grid_grad,
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GPU,
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ALL_LAYOUT,
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phi::AffineGridGradCUDAKernel,
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float,
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double){};
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