wehub-resource-sync
992 lines
38 KiB
Plaintext
992 lines
38 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/adam_kernel.h"
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#include <math.h> // for sqrt in CPU and CUDA
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#include <vector>
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#include "glog/logging.h"
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#include "paddle/common/flags.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/common/amp_type_traits.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/core/tensor_utils.h"
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#include "paddle/phi/kernels/funcs/adam_functors.h"
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#include "paddle/phi/kernels/funcs/for_range.h"
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COMMON_DECLARE_bool(use_accuracy_compatible_kernel);
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namespace phi {
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template <typename T, typename TG, typename MT>
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__global__ void AdamKernelREG(MT beta1,
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MT beta2,
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MT epsilon,
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MT beta1_pow_,
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MT beta2_pow_,
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const MT* moment1,
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MT* moment1_out,
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const MT* moment2,
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MT* moment2_out,
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const MT* moment2_max,
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MT* moment2_max_out,
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const double* lr_,
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const TG* grad,
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const T* param,
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T* param_out,
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const MT* master_param,
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MT* master_param_out,
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int64_t ndim,
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bool amsgrad) {
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MT lr = static_cast<MT>(*lr_);
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MT beta1_pow = beta1_pow_;
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MT beta2_pow = beta2_pow_;
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int64_t id =
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static_cast<int64_t>(blockIdx.x) * static_cast<int64_t>(blockDim.x) +
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static_cast<int64_t>(threadIdx.x);
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for (; id < ndim; id += gridDim.x * blockDim.x) {
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MT p = master_param ? master_param[id] : static_cast<MT>(param[id]);
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MT g = static_cast<MT>(grad[id]);
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MT mom1 = static_cast<MT>(moment1[id]);
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MT mom2 = static_cast<MT>(moment2[id]);
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mom1 = beta1 * mom1 + (static_cast<MT>(1.0) - beta1) * g;
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mom2 = beta2 * mom2 + (static_cast<MT>(1.0) - beta2) * g * g;
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MT denom;
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if (amsgrad) {
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MT mom2_max = static_cast<MT>(moment2_max[id]);
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MT mom2_max_ = std::max(mom2, mom2_max);
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moment2_max_out[id] = mom2_max_;
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denom =
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(sqrt(mom2_max_) / sqrt(static_cast<MT>(1.0) - beta2_pow)) + epsilon;
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} else {
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denom = (sqrt(mom2) / sqrt(static_cast<MT>(1.0) - beta2_pow)) + epsilon;
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}
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p += (mom1 / denom) * (-(lr / (static_cast<MT>(1.0) - beta1_pow)));
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moment1_out[id] = mom1;
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moment2_out[id] = mom2;
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param_out[id] = static_cast<T>(p);
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if (master_param_out) {
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master_param_out[id] = p;
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}
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}
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}
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template <typename T, typename TG, typename MT>
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__global__ void AdamKernelMEM(MT beta1,
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MT beta2,
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MT epsilon,
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const MT* beta1_pow_,
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const MT* beta2_pow_,
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const MT* moment1,
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MT* moment1_out,
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const MT* moment2,
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MT* moment2_out,
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const MT* moment2_max,
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MT* moment2_max_out,
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const double* lr_,
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const TG* grad,
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const T* param,
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T* param_out,
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const MT* master_param,
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MT* master_param_out,
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int64_t ndim,
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bool amsgrad) {
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MT lr = static_cast<MT>(*lr_);
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MT beta1_pow = *beta1_pow_;
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MT beta2_pow = *beta2_pow_;
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int64_t id =
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static_cast<int64_t>(blockIdx.x) * static_cast<int64_t>(blockDim.x) +
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static_cast<int64_t>(threadIdx.x);
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for (; id < ndim; id += gridDim.x * blockDim.x) {
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MT p = master_param ? master_param[id] : static_cast<MT>(param[id]);
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MT g = static_cast<MT>(grad[id]);
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MT mom1 = static_cast<MT>(moment1[id]);
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MT mom2 = static_cast<MT>(moment2[id]);
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mom1 = beta1 * mom1 + (static_cast<MT>(1.0) - beta1) * g;
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mom2 = beta2 * mom2 + (static_cast<MT>(1.0) - beta2) * g * g;
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MT denom;
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if (amsgrad) {
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MT mom2_max = static_cast<MT>(moment2_max[id]);
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MT mom2_max_ = std::max(mom2, mom2_max);
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moment2_max_out[id] = mom2_max_;
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denom =
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(sqrt(mom2_max_) / sqrt(static_cast<MT>(1.0) - beta2_pow)) + epsilon;
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} else {
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denom = (sqrt(mom2) / sqrt(static_cast<MT>(1.0) - beta2_pow)) + epsilon;
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}
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p += (mom1 / denom) * (-(lr / (static_cast<MT>(1.0) - beta1_pow)));
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moment1_out[id] = mom1;
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moment2_out[id] = mom2;
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param_out[id] = static_cast<T>(p);
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if (master_param_out) {
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master_param_out[id] = p;
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}
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}
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}
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template <typename T>
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__global__ void UpdateBetaPow(T beta1,
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T beta2,
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const T* beta1_pow_,
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const T* beta2_pow_,
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T* beta1_pow_out,
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T* beta2_pow_out) {
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*beta1_pow_out = beta1 * beta1_pow_[0];
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*beta2_pow_out = beta2 * beta2_pow_[0];
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}
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// ---- Torch-compatible Adam infrastructure ----
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// LrAccessor for Adam: lr tensor is MT (float), upcast to double on device.
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template <typename MT, bool IsCpu>
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struct AdamLrAccessor;
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template <typename MT>
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struct AdamLrAccessor<MT, true> {
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const double lr_double;
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explicit AdamLrAccessor(double lr) : lr_double(lr) {}
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__device__ __forceinline__ double GetLrDouble() const { return lr_double; }
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};
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template <typename MT>
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struct AdamLrAccessor<MT, false> {
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const double* lr;
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explicit AdamLrAccessor(const double* lr) : lr(lr) {}
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__device__ __forceinline__ double GetLrDouble() const { return *lr; }
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};
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// Bias correction accessors matching torch's step_count-based computation.
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template <typename MT, bool IsCpu>
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struct AdamBiasCorrAccessorCompat;
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template <typename MT>
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struct AdamBiasCorrAccessorCompat<MT, true> {
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const double beta1;
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const double beta2;
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const float step_count;
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AdamBiasCorrAccessorCompat(double b1, double b2, float sc)
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: beta1(b1), beta2(b2), step_count(sc) {}
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__device__ __forceinline__ double GetBc1() const {
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return 1.0 - ::pow(beta1, step_count);
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}
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__device__ __forceinline__ double GetBc2() const {
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return 1.0 - ::pow(beta2, step_count);
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}
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};
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template <typename MT>
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struct AdamBiasCorrAccessorCompat<MT, false> {
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const double beta1;
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const double beta2;
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const MT* beta1_pow;
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AdamBiasCorrAccessorCompat(double b1, double b2, const MT* bp1)
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: beta1(b1), beta2(b2), beta1_pow(bp1) {}
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__device__ __forceinline__ double GetBc1() const {
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const float sc = static_cast<float>(
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::round(::log(static_cast<double>(*beta1_pow)) / ::log(beta1)));
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return 1.0 - ::pow(beta1, sc);
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}
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__device__ __forceinline__ double GetBc2() const {
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const float sc = static_cast<float>(
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::round(::log(static_cast<double>(*beta1_pow)) / ::log(beta1)));
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return 1.0 - ::pow(beta2, sc);
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}
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};
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// Torch-compatible Adam kernel: no weight decay, float lr upcast to double,
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// FMA-based moment updates matching torch's fused adam math.
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template <typename T,
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typename TG,
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typename MT,
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typename LrAccessor,
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typename BiasCorrAccessor>
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__global__ void AdamStyleKernel(const double beta1,
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const double beta2,
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const double epsilon,
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LrAccessor lr_accessor,
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BiasCorrAccessor bias_corr_accessor,
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const TG* __restrict__ grad,
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const T* __restrict__ param,
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T* __restrict__ param_out,
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const MT* __restrict__ master_param,
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MT* __restrict__ master_param_out,
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const MT* __restrict__ moment1,
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MT* __restrict__ moment1_out,
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const MT* __restrict__ moment2,
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MT* __restrict__ moment2_out,
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const MT* __restrict__ moment2_max,
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MT* __restrict__ moment2_max_out,
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int64_t ndim,
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bool amsgrad) {
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__shared__ double one_minus_beta1_shared;
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__shared__ double one_minus_beta2_shared;
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__shared__ MT bias_correction2_sqrt_shared;
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__shared__ MT step_size_shared;
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if (threadIdx.x == 0) {
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const double lr_double = lr_accessor.GetLrDouble();
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const double bc1_dbl = bias_corr_accessor.GetBc1();
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const double bc2_dbl = bias_corr_accessor.GetBc2();
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const double bc2_sqrt_dbl = ::sqrt(bc2_dbl);
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one_minus_beta1_shared = 1.0 - beta1;
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one_minus_beta2_shared = 1.0 - beta2;
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const MT bias_correction1 = static_cast<MT>(bc1_dbl);
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bias_correction2_sqrt_shared = static_cast<MT>(bc2_sqrt_dbl);
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step_size_shared = lr_double / bias_correction1;
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}
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__syncthreads();
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const double one_minus_beta1 = one_minus_beta1_shared;
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const double one_minus_beta2 = one_minus_beta2_shared;
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const MT bias_correction2_sqrt = bias_correction2_sqrt_shared;
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const MT step_size = step_size_shared;
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int64_t id =
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static_cast<int64_t>(blockIdx.x) * static_cast<int64_t>(blockDim.x) +
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static_cast<int64_t>(threadIdx.x);
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for (; id < ndim; id += static_cast<int64_t>(gridDim.x) *
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static_cast<int64_t>(blockDim.x)) {
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MT p = master_param ? master_param[id] : static_cast<MT>(param[id]);
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MT g = static_cast<MT>(grad[id]);
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MT exp_avg = static_cast<MT>(moment1[id]);
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MT exp_avg_sq = static_cast<MT>(moment2[id]);
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const double g_d = static_cast<double>(g);
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// exp_avg = beta1 * exp_avg + (1 - beta1) * grad
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// FMA variant A: compute (1-beta1)*grad first, then fma(beta1, exp_avg,
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// t2). This matches NVCC's fused adam: beta1*exp_avg computed exactly in
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// FMA.
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{
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const double exp_avg_d = static_cast<double>(exp_avg);
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const double t2 = __dmul_rn(one_minus_beta1, g_d);
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exp_avg = static_cast<MT>(__fma_rn(beta1, exp_avg_d, t2));
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}
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// exp_avg_sq = beta2 * exp_avg_sq + (1 - beta2) * grad^2
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// Left-to-right: ((1-beta2)*g)*g, then separate add, matching PyTorch.
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{
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const double exp_avg_sq_d = static_cast<double>(exp_avg_sq);
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const double t1 = __dmul_rn(beta2, exp_avg_sq_d);
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const double t2 = __dmul_rn(one_minus_beta2, g_d);
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const double t3 = __dmul_rn(t2, g_d);
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exp_avg_sq = static_cast<MT>(__dadd_rn(t1, t3));
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}
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MT denom;
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if (amsgrad) {
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MT max_exp_avg_sq = static_cast<MT>(moment2_max[id]);
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max_exp_avg_sq =
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max_exp_avg_sq > exp_avg_sq ? max_exp_avg_sq : exp_avg_sq;
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moment2_max_out[id] = max_exp_avg_sq;
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denom = (sqrt(max_exp_avg_sq) / bias_correction2_sqrt) + epsilon;
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} else {
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denom = (sqrt(exp_avg_sq) / bias_correction2_sqrt) + epsilon;
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}
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p -= step_size * exp_avg / denom;
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moment1_out[id] = exp_avg;
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moment2_out[id] = exp_avg_sq;
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param_out[id] = static_cast<T>(p);
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if (master_param_out) {
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master_param_out[id] = p;
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}
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}
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}
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template <typename T, typename Context>
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void AdamDenseKernel_compatible(const Context& dev_ctx,
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const DenseTensor& param,
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const DenseTensor& grad,
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const DenseTensor& learning_rate,
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const DenseTensor& moment1,
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const DenseTensor& moment2,
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const optional<DenseTensor>& moment2_max,
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const DenseTensor& beta1_pow,
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const DenseTensor& beta2_pow,
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const optional<DenseTensor>& master_param,
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const optional<DenseTensor>& skip_update,
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const Scalar& beta1,
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const Scalar& beta2,
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const Scalar& epsilon,
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bool lazy_mode,
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int64_t min_row_size_to_use_multithread,
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bool multi_precision,
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bool use_global_beta_pow,
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bool amsgrad,
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DenseTensor* param_out,
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DenseTensor* moment1_out,
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DenseTensor* moment2_out,
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DenseTensor* moment2_max_out,
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DenseTensor* beta1_pow_out,
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DenseTensor* beta2_pow_out,
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DenseTensor* master_param_outs) {
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using MT = typename MPTypeTrait<T>::Type;
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bool skip_update_ = false;
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if (skip_update.is_initialized()) {
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PADDLE_ENFORCE_EQ(
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skip_update->numel(),
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1,
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errors::InvalidArgument("Input(SkipUpdate) size must be 1, but get %d",
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skip_update->numel()));
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std::vector<bool> skip_update_vec;
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TensorToVector(*skip_update, dev_ctx, &skip_update_vec);
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skip_update_ = skip_update_vec[0];
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}
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if (skip_update_) {
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VLOG(4) << "Adam skip update";
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Copy(dev_ctx, param, dev_ctx.GetPlace(), false, param_out);
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Copy(dev_ctx, moment1, dev_ctx.GetPlace(), false, moment1_out);
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Copy(dev_ctx, moment2, dev_ctx.GetPlace(), false, moment2_out);
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if (amsgrad) {
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Copy(dev_ctx,
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moment2_max.get(),
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dev_ctx.GetPlace(),
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false,
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moment2_max_out);
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}
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if (!use_global_beta_pow) {
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Copy(dev_ctx, beta1_pow, beta1_pow.place(), false, beta1_pow_out);
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Copy(dev_ctx, beta2_pow, beta2_pow.place(), false, beta2_pow_out);
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}
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return;
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}
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double beta1_ = beta1.to<double>();
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double beta2_ = beta2.to<double>();
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double epsilon_ = epsilon.to<double>();
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PADDLE_ENFORCE_EQ(
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beta1_pow_out->numel(),
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1,
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errors::InvalidArgument("beta1 pow output size should be 1, but received "
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"value is:%d.",
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beta1_pow_out->numel()));
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PADDLE_ENFORCE_EQ(
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beta2_pow_out->numel(),
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1,
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errors::InvalidArgument("beta2 pow output size should be 1, but received "
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"value is:%d.",
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beta2_pow_out->numel()));
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const bool beta_pow_on_cpu =
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beta1_pow.place() == CPUPlace() && beta2_pow.place() == CPUPlace();
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const bool lr_on_cpu = learning_rate.place() == CPUPlace();
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// Read float lr on host if available; on device it's read in kernel.
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double lr_host_double = 0.0;
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if (lr_on_cpu) {
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lr_host_double = learning_rate.data<double>()[0];
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}
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const MT* master_in_data =
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multi_precision ? master_param->data<MT>() : nullptr;
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MT* master_out_data =
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multi_precision ? dev_ctx.template Alloc<MT>(master_param_outs) : nullptr;
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const MT* moment2_max_in_data =
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amsgrad ? moment2_max.get().data<MT>() : nullptr;
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MT* moment2_max_out_data =
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amsgrad ? dev_ctx.template Alloc<MT>(moment2_max_out) : nullptr;
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int threads = 512;
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int64_t blocks_max = dev_ctx.GetCUDAMaxGridDimSize()[0];
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int blocks = std::min((param.numel() + threads - 1) / threads, blocks_max);
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const bool use_float32_grad = grad.dtype() == DataType::FLOAT32;
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// Use decltype so template args are inferred from the local accessor variables.
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#define LAUNCH_ADAM_STYLE_KERNEL() \
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if (use_float32_grad) { \
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AdamStyleKernel<T, \
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float, \
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MT, \
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decltype(lr_accessor), \
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decltype(bias_corr_accessor)> \
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<<<blocks, threads, 0, dev_ctx.stream()>>>( \
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beta1_, \
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beta2_, \
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epsilon_, \
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lr_accessor, \
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bias_corr_accessor, \
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grad.data<float>(), \
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param.data<T>(), \
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dev_ctx.template Alloc<T>(param_out), \
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master_in_data, \
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master_out_data, \
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moment1.data<MT>(), \
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dev_ctx.template Alloc<MT>(moment1_out), \
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moment2.data<MT>(), \
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dev_ctx.template Alloc<MT>(moment2_out), \
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moment2_max_in_data, \
|
|
moment2_max_out_data, \
|
|
param.numel(), \
|
|
amsgrad); \
|
|
} else { \
|
|
AdamStyleKernel<T, \
|
|
T, \
|
|
MT, \
|
|
decltype(lr_accessor), \
|
|
decltype(bias_corr_accessor)> \
|
|
<<<blocks, threads, 0, dev_ctx.stream()>>>( \
|
|
beta1_, \
|
|
beta2_, \
|
|
epsilon_, \
|
|
lr_accessor, \
|
|
bias_corr_accessor, \
|
|
grad.data<T>(), \
|
|
param.data<T>(), \
|
|
dev_ctx.template Alloc<T>(param_out), \
|
|
master_in_data, \
|
|
master_out_data, \
|
|
moment1.data<MT>(), \
|
|
dev_ctx.template Alloc<MT>(moment1_out), \
|
|
moment2.data<MT>(), \
|
|
dev_ctx.template Alloc<MT>(moment2_out), \
|
|
moment2_max_in_data, \
|
|
moment2_max_out_data, \
|
|
param.numel(), \
|
|
amsgrad); \
|
|
}
|
|
|
|
if (lr_on_cpu) {
|
|
AdamLrAccessor<MT, true> lr_accessor(lr_host_double);
|
|
if (beta_pow_on_cpu) {
|
|
const float sc = static_cast<float>(
|
|
std::round(std::log(static_cast<double>(beta1_pow.data<MT>()[0])) /
|
|
std::log(beta1_)));
|
|
AdamBiasCorrAccessorCompat<MT, true> bias_corr_accessor(
|
|
beta1_, beta2_, sc);
|
|
LAUNCH_ADAM_STYLE_KERNEL()
|
|
} else {
|
|
AdamBiasCorrAccessorCompat<MT, false> bias_corr_accessor(
|
|
beta1_, beta2_, beta1_pow.data<MT>());
|
|
LAUNCH_ADAM_STYLE_KERNEL()
|
|
}
|
|
} else {
|
|
AdamLrAccessor<MT, false> lr_accessor(learning_rate.data<double>());
|
|
if (beta_pow_on_cpu) {
|
|
const float sc = static_cast<float>(
|
|
std::round(std::log(static_cast<double>(beta1_pow.data<MT>()[0])) /
|
|
std::log(beta1_)));
|
|
AdamBiasCorrAccessorCompat<MT, true> bias_corr_accessor(
|
|
beta1_, beta2_, sc);
|
|
LAUNCH_ADAM_STYLE_KERNEL()
|
|
} else {
|
|
AdamBiasCorrAccessorCompat<MT, false> bias_corr_accessor(
|
|
beta1_, beta2_, beta1_pow.data<MT>());
|
|
LAUNCH_ADAM_STYLE_KERNEL()
|
|
}
|
|
}
|
|
#undef LAUNCH_ADAM_STYLE_KERNEL
|
|
|
|
if (!use_global_beta_pow) {
|
|
if (beta_pow_on_cpu) {
|
|
dev_ctx.template HostAlloc<MT>(beta1_pow_out)[0] =
|
|
static_cast<MT>(beta1_) * beta1_pow.data<MT>()[0];
|
|
dev_ctx.template HostAlloc<MT>(beta2_pow_out)[0] =
|
|
static_cast<MT>(beta2_) * beta2_pow.data<MT>()[0];
|
|
} else {
|
|
UpdateBetaPow<MT><<<1, 1, 0, dev_ctx.stream()>>>(
|
|
static_cast<MT>(beta1_),
|
|
static_cast<MT>(beta2_),
|
|
beta1_pow.data<MT>(),
|
|
beta2_pow.data<MT>(),
|
|
dev_ctx.template Alloc<MT>(beta1_pow_out),
|
|
dev_ctx.template Alloc<MT>(beta2_pow_out));
|
|
}
|
|
}
|
|
}
|
|
|
|
template <typename T, typename Context>
|
|
PADDLE_API void AdamDenseKernel(const Context& dev_ctx,
|
|
const DenseTensor& param,
|
|
const DenseTensor& grad,
|
|
const DenseTensor& learning_rate,
|
|
const DenseTensor& moment1,
|
|
const DenseTensor& moment2,
|
|
const optional<DenseTensor>& moment2_max,
|
|
const DenseTensor& beta1_pow,
|
|
const DenseTensor& beta2_pow,
|
|
const optional<DenseTensor>& master_param,
|
|
const optional<DenseTensor>& skip_update,
|
|
const Scalar& beta1,
|
|
const Scalar& beta2,
|
|
const Scalar& epsilon,
|
|
bool lazy_mode,
|
|
int64_t min_row_size_to_use_multithread,
|
|
bool multi_precision,
|
|
bool use_global_beta_pow,
|
|
bool amsgrad,
|
|
DenseTensor* param_out,
|
|
DenseTensor* moment1_out,
|
|
DenseTensor* moment2_out,
|
|
DenseTensor* moment2_max_out,
|
|
DenseTensor* beta1_pow_out,
|
|
DenseTensor* beta2_pow_out,
|
|
DenseTensor* master_param_outs) {
|
|
if (FLAGS_use_accuracy_compatible_kernel) {
|
|
AdamDenseKernel_compatible<T, Context>(dev_ctx,
|
|
param,
|
|
grad,
|
|
learning_rate,
|
|
moment1,
|
|
moment2,
|
|
moment2_max,
|
|
beta1_pow,
|
|
beta2_pow,
|
|
master_param,
|
|
skip_update,
|
|
beta1,
|
|
beta2,
|
|
epsilon,
|
|
lazy_mode,
|
|
min_row_size_to_use_multithread,
|
|
multi_precision,
|
|
use_global_beta_pow,
|
|
amsgrad,
|
|
param_out,
|
|
moment1_out,
|
|
moment2_out,
|
|
moment2_max_out,
|
|
beta1_pow_out,
|
|
beta2_pow_out,
|
|
master_param_outs);
|
|
return;
|
|
}
|
|
using MT = typename MPTypeTrait<T>::Type;
|
|
const auto grad_type = grad.dtype();
|
|
|
|
VLOG(4) << "use_global_beta_pow:" << use_global_beta_pow;
|
|
VLOG(4) << "amsgrad: " << amsgrad;
|
|
|
|
bool skip_update_ = false;
|
|
if (skip_update.is_initialized()) {
|
|
PADDLE_ENFORCE_EQ(
|
|
skip_update->numel(),
|
|
1,
|
|
errors::InvalidArgument("Input(SkipUpdate) size must be 1, but get %d",
|
|
skip_update->numel()));
|
|
std::vector<bool> skip_update_vec;
|
|
TensorToVector(*skip_update, dev_ctx, &skip_update_vec);
|
|
skip_update_ = skip_update_vec[0];
|
|
}
|
|
// skip_update=true, just copy input to output, and TensorCopy will call
|
|
// mutable_data
|
|
if (skip_update_) {
|
|
VLOG(4) << "Adam skip update";
|
|
Copy(dev_ctx, param, dev_ctx.GetPlace(), false, param_out);
|
|
Copy(dev_ctx, moment1, dev_ctx.GetPlace(), false, moment1_out);
|
|
Copy(dev_ctx, moment2, dev_ctx.GetPlace(), false, moment2_out);
|
|
if (amsgrad) {
|
|
Copy(dev_ctx,
|
|
moment2_max.get(),
|
|
dev_ctx.GetPlace(),
|
|
false,
|
|
moment2_max_out);
|
|
}
|
|
if (!use_global_beta_pow) {
|
|
Copy(dev_ctx, beta1_pow, beta1_pow.place(), false, beta1_pow_out);
|
|
Copy(dev_ctx, beta2_pow, beta2_pow.place(), false, beta2_pow_out);
|
|
}
|
|
return;
|
|
}
|
|
|
|
MT beta1_ = beta1.to<MT>();
|
|
MT beta2_ = beta2.to<MT>();
|
|
MT epsilon_ = epsilon.to<MT>();
|
|
VLOG(3) << "beta1_pow.numel() : " << beta1_pow.numel()
|
|
<< "beta2_pow.numel() : " << beta2_pow.numel();
|
|
VLOG(3) << "param.numel(): " << param.numel();
|
|
PADDLE_ENFORCE_EQ(
|
|
beta1_pow_out->numel(),
|
|
1,
|
|
errors::InvalidArgument("beta1 pow output size should be 1, but received "
|
|
"value is:%d.",
|
|
beta1_pow_out->numel()));
|
|
|
|
PADDLE_ENFORCE_EQ(
|
|
beta2_pow_out->numel(),
|
|
1,
|
|
errors::InvalidArgument("beta2 pow output size should be 1, but received "
|
|
"value is:%d.",
|
|
beta2_pow_out->numel()));
|
|
|
|
const MT* master_in_data =
|
|
multi_precision ? master_param->data<MT>() : nullptr;
|
|
MT* master_out_data =
|
|
multi_precision ? dev_ctx.template Alloc<MT>(master_param_outs) : nullptr;
|
|
|
|
const MT* moment2_max_in_data =
|
|
amsgrad ? moment2_max.get().data<MT>() : nullptr;
|
|
MT* moment2_max_out_data =
|
|
amsgrad ? dev_ctx.template Alloc<MT>(moment2_max_out) : nullptr;
|
|
|
|
// update param and moment
|
|
int threads = 512;
|
|
int64_t blocks_max = dev_ctx.GetCUDAMaxGridDimSize()[0];
|
|
int blocks = std::min((param.numel() + threads - 1) / threads, blocks_max);
|
|
|
|
if (beta1_pow.place() == CPUPlace() && beta2_pow.place() == CPUPlace()) {
|
|
// Compute with betapow in REG
|
|
if (grad_type == DataType::FLOAT32) {
|
|
AdamKernelREG<T, float, MT><<<blocks, threads, 0, dev_ctx.stream()>>>(
|
|
beta1_,
|
|
beta2_,
|
|
epsilon_,
|
|
*beta1_pow.data<MT>(),
|
|
*beta2_pow.data<MT>(),
|
|
moment1.data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment1_out),
|
|
moment2.data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment2_out),
|
|
moment2_max_in_data,
|
|
moment2_max_out_data,
|
|
learning_rate.data<double>(),
|
|
grad.data<float>(),
|
|
param.data<T>(),
|
|
dev_ctx.template Alloc<T>(param_out),
|
|
master_in_data,
|
|
master_out_data,
|
|
param.numel(),
|
|
amsgrad);
|
|
} else {
|
|
AdamKernelREG<T, T, MT><<<blocks, threads, 0, dev_ctx.stream()>>>(
|
|
beta1_,
|
|
beta2_,
|
|
epsilon_,
|
|
*beta1_pow.data<MT>(),
|
|
*beta2_pow.data<MT>(),
|
|
moment1.data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment1_out),
|
|
moment2.data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment2_out),
|
|
moment2_max_in_data,
|
|
moment2_max_out_data,
|
|
learning_rate.data<double>(),
|
|
grad.data<T>(),
|
|
param.data<T>(),
|
|
dev_ctx.template Alloc<T>(param_out),
|
|
master_in_data,
|
|
master_out_data,
|
|
param.numel(),
|
|
amsgrad);
|
|
}
|
|
if (!use_global_beta_pow) {
|
|
// Cpu update
|
|
dev_ctx.template HostAlloc<MT>(beta1_pow_out)[0] =
|
|
beta1_ * beta1_pow.data<MT>()[0];
|
|
dev_ctx.template HostAlloc<MT>(beta2_pow_out)[0] =
|
|
beta2_ * beta2_pow.data<MT>()[0];
|
|
}
|
|
} else {
|
|
if (grad_type == DataType::FLOAT32) {
|
|
AdamKernelMEM<T, float, MT><<<blocks, threads, 0, dev_ctx.stream()>>>(
|
|
beta1_,
|
|
beta2_,
|
|
epsilon_,
|
|
beta1_pow.data<MT>(),
|
|
beta2_pow.data<MT>(),
|
|
moment1.data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment1_out),
|
|
moment2.data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment2_out),
|
|
moment2_max_in_data,
|
|
moment2_max_out_data,
|
|
learning_rate.data<double>(),
|
|
grad.data<float>(),
|
|
param.data<T>(),
|
|
dev_ctx.template Alloc<T>(param_out),
|
|
master_in_data,
|
|
master_out_data,
|
|
param.numel(),
|
|
amsgrad);
|
|
} else {
|
|
AdamKernelMEM<T, T, MT><<<blocks, threads, 0, dev_ctx.stream()>>>(
|
|
beta1_,
|
|
beta2_,
|
|
epsilon_,
|
|
beta1_pow.data<MT>(),
|
|
beta2_pow.data<MT>(),
|
|
moment1.data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment1_out),
|
|
moment2.data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment2_out),
|
|
moment2_max_in_data,
|
|
moment2_max_out_data,
|
|
learning_rate.data<double>(),
|
|
grad.data<T>(),
|
|
param.data<T>(),
|
|
dev_ctx.template Alloc<T>(param_out),
|
|
master_in_data,
|
|
master_out_data,
|
|
param.numel(),
|
|
amsgrad);
|
|
}
|
|
if (!use_global_beta_pow) {
|
|
// Update with gpu
|
|
UpdateBetaPow<MT><<<1, 1, 0, dev_ctx.stream()>>>(
|
|
beta1_,
|
|
beta2_,
|
|
beta1_pow.data<MT>(),
|
|
beta2_pow.data<MT>(),
|
|
dev_ctx.template Alloc<MT>(beta1_pow_out),
|
|
dev_ctx.template Alloc<MT>(beta2_pow_out));
|
|
}
|
|
}
|
|
}
|
|
|
|
template <typename T, typename Context>
|
|
void MergedAdamKernel(
|
|
const Context& dev_ctx,
|
|
const std::vector<const DenseTensor*>& param,
|
|
const std::vector<const DenseTensor*>& grad,
|
|
const std::vector<const DenseTensor*>& learning_rate,
|
|
const std::vector<const DenseTensor*>& moment1,
|
|
const std::vector<const DenseTensor*>& moment2,
|
|
const optional<std::vector<const DenseTensor*>>& moment2_max,
|
|
const std::vector<const DenseTensor*>& beta1_pow,
|
|
const std::vector<const DenseTensor*>& beta2_pow,
|
|
const optional<std::vector<const DenseTensor*>>& master_param,
|
|
const Scalar& beta1,
|
|
const Scalar& beta2,
|
|
const Scalar& epsilon,
|
|
bool multi_precision,
|
|
bool use_global_beta_pow,
|
|
bool amsgrad,
|
|
std::vector<DenseTensor*> param_out,
|
|
std::vector<DenseTensor*> moment1_out,
|
|
std::vector<DenseTensor*> moment2_out,
|
|
std::vector<DenseTensor*> moment2_max_out,
|
|
std::vector<DenseTensor*> beta1_pow_out,
|
|
std::vector<DenseTensor*> beta2_pow_out,
|
|
std::vector<DenseTensor*> master_param_out) {
|
|
using MT = typename MPTypeTrait<T>::Type;
|
|
VLOG(4) << "use_global_beta_pow:" << use_global_beta_pow;
|
|
MT beta1_ = beta1.to<MT>();
|
|
MT beta2_ = beta2.to<MT>();
|
|
MT epsilon_ = epsilon.to<MT>();
|
|
|
|
size_t param_num = param.size();
|
|
|
|
for (size_t idx = 0; idx < param_num; idx++) {
|
|
const MT* master_in_data =
|
|
multi_precision ? master_param.get()[idx]->data<MT>() : nullptr;
|
|
MT* master_out_data =
|
|
multi_precision ? dev_ctx.template Alloc<MT>(master_param_out[idx])
|
|
: nullptr;
|
|
|
|
const MT* moment2_max_in_data =
|
|
amsgrad ? moment2_max.get()[idx]->data<MT>() : nullptr;
|
|
MT* moment2_max_out_data =
|
|
amsgrad ? dev_ctx.template Alloc<MT>(moment2_max_out[idx]) : nullptr;
|
|
|
|
// update param and moment
|
|
int threads = 512;
|
|
int64_t blocks_max = dev_ctx.GetCUDAMaxGridDimSize()[0];
|
|
int blocks =
|
|
std::min((param[idx]->numel() + threads - 1) / threads, blocks_max);
|
|
|
|
const auto grad_type = grad[idx]->dtype();
|
|
if (beta1_pow[idx]->place() == CPUPlace() &&
|
|
beta2_pow[idx]->place() == CPUPlace()) {
|
|
// Compute with betapow in REG
|
|
if (grad_type == DataType::FLOAT32) {
|
|
AdamKernelREG<T, float, MT><<<blocks, threads, 0, dev_ctx.stream()>>>(
|
|
beta1_,
|
|
beta2_,
|
|
epsilon_,
|
|
*beta1_pow[idx]->data<MT>(),
|
|
*beta2_pow[idx]->data<MT>(),
|
|
moment1[idx]->data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment1_out[idx]),
|
|
moment2[idx]->data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment2_out[idx]),
|
|
moment2_max_in_data,
|
|
moment2_max_out_data,
|
|
learning_rate[idx]->data<double>(),
|
|
grad[idx]->data<float>(),
|
|
param[idx]->data<T>(),
|
|
dev_ctx.template Alloc<T>(param_out[idx]),
|
|
master_in_data,
|
|
master_out_data,
|
|
param[idx]->numel(),
|
|
amsgrad);
|
|
} else {
|
|
AdamKernelREG<T, T, MT><<<blocks, threads, 0, dev_ctx.stream()>>>(
|
|
beta1_,
|
|
beta2_,
|
|
epsilon_,
|
|
*beta1_pow[idx]->data<MT>(),
|
|
*beta2_pow[idx]->data<MT>(),
|
|
moment1[idx]->data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment1_out[idx]),
|
|
moment2[idx]->data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment2_out[idx]),
|
|
moment2_max_in_data,
|
|
moment2_max_out_data,
|
|
learning_rate[idx]->data<double>(),
|
|
grad[idx]->data<T>(),
|
|
param[idx]->data<T>(),
|
|
dev_ctx.template Alloc<T>(param_out[idx]),
|
|
master_in_data,
|
|
master_out_data,
|
|
param[idx]->numel(),
|
|
amsgrad);
|
|
}
|
|
if (!use_global_beta_pow) {
|
|
// Cpu update
|
|
dev_ctx.template HostAlloc<MT>(beta1_pow_out[idx])[0] =
|
|
beta1_ * beta1_pow[idx]->data<MT>()[0];
|
|
dev_ctx.template HostAlloc<MT>(beta2_pow_out[idx])[0] =
|
|
beta2_ * beta2_pow[idx]->data<MT>()[0];
|
|
}
|
|
} else {
|
|
if (grad_type == DataType::FLOAT32) {
|
|
AdamKernelMEM<T, float, MT><<<blocks, threads, 0, dev_ctx.stream()>>>(
|
|
beta1_,
|
|
beta2_,
|
|
epsilon_,
|
|
beta1_pow[idx]->data<MT>(),
|
|
beta2_pow[idx]->data<MT>(),
|
|
moment1[idx]->data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment1_out[idx]),
|
|
moment2[idx]->data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment2_out[idx]),
|
|
moment2_max_in_data,
|
|
moment2_max_out_data,
|
|
learning_rate[idx]->data<double>(),
|
|
grad[idx]->data<float>(),
|
|
param[idx]->data<T>(),
|
|
dev_ctx.template Alloc<T>(param_out[idx]),
|
|
master_in_data,
|
|
master_out_data,
|
|
param[idx]->numel(),
|
|
amsgrad);
|
|
} else {
|
|
AdamKernelMEM<T, T, MT><<<blocks, threads, 0, dev_ctx.stream()>>>(
|
|
beta1_,
|
|
beta2_,
|
|
epsilon_,
|
|
beta1_pow[idx]->data<MT>(),
|
|
beta2_pow[idx]->data<MT>(),
|
|
moment1[idx]->data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment1_out[idx]),
|
|
moment2[idx]->data<MT>(),
|
|
dev_ctx.template Alloc<MT>(moment2_out[idx]),
|
|
moment2_max_in_data,
|
|
moment2_max_out_data,
|
|
learning_rate[idx]->data<double>(),
|
|
grad[idx]->data<T>(),
|
|
param[idx]->data<T>(),
|
|
dev_ctx.template Alloc<T>(param_out[idx]),
|
|
master_in_data,
|
|
master_out_data,
|
|
param[idx]->numel(),
|
|
amsgrad);
|
|
}
|
|
if (!use_global_beta_pow) {
|
|
// Update with gpu
|
|
UpdateBetaPow<MT><<<1, 1, 0, dev_ctx.stream()>>>(
|
|
beta1_,
|
|
beta2_,
|
|
beta1_pow[idx]->data<MT>(),
|
|
beta2_pow[idx]->data<MT>(),
|
|
dev_ctx.template Alloc<MT>(beta1_pow_out[idx]),
|
|
dev_ctx.template Alloc<MT>(beta2_pow_out[idx]));
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
} // namespace phi
|
|
|
|
PD_REGISTER_KERNEL(adam,
|
|
GPU,
|
|
ALL_LAYOUT,
|
|
phi::AdamDenseKernel,
|
|
float,
|
|
double,
|
|
phi::float16,
|
|
phi::bfloat16) {
|
|
kernel->InputAt(2).SetDataType(phi::DataType::FLOAT64);
|
|
// Skip beta1_pow, beta2_pow, skip_update data transform
|
|
kernel->InputAt(6).SetBackend(phi::Backend::ALL_BACKEND);
|
|
kernel->InputAt(7).SetBackend(phi::Backend::ALL_BACKEND);
|
|
kernel->InputAt(9).SetBackend(phi::Backend::ALL_BACKEND);
|
|
|
|
if (kernel_key.dtype() == phi::DataType::FLOAT16 ||
|
|
kernel_key.dtype() == phi::DataType::BFLOAT16) {
|
|
kernel->OutputAt(1).SetDataType(phi::DataType::FLOAT32);
|
|
kernel->OutputAt(2).SetDataType(phi::DataType::FLOAT32);
|
|
kernel->OutputAt(3).SetDataType(phi::DataType::FLOAT32);
|
|
kernel->OutputAt(4).SetDataType(phi::DataType::FLOAT32);
|
|
kernel->OutputAt(5).SetDataType(phi::DataType::FLOAT32);
|
|
kernel->OutputAt(6).SetDataType(phi::DataType::FLOAT32);
|
|
}
|
|
kernel->OutputAt(4).SetBackend(phi::Backend::UNDEFINED);
|
|
kernel->OutputAt(5).SetBackend(phi::Backend::UNDEFINED);
|
|
}
|
|
|
|
PD_REGISTER_KERNEL(merged_adam,
|
|
GPU,
|
|
ALL_LAYOUT,
|
|
phi::MergedAdamKernel,
|
|
float,
|
|
double,
|
|
phi::float16,
|
|
phi::bfloat16) {
|
|
kernel->InputAt(2).SetDataType(phi::DataType::FLOAT64);
|
|
// Skip beta1_pow, beta2_pow data transform
|
|
kernel->InputAt(6).SetBackend(phi::Backend::ALL_BACKEND);
|
|
kernel->InputAt(7).SetBackend(phi::Backend::ALL_BACKEND);
|
|
|
|
if (kernel_key.dtype() == phi::DataType::FLOAT16 ||
|
|
kernel_key.dtype() == phi::DataType::BFLOAT16) {
|
|
kernel->OutputAt(1).SetDataType(phi::DataType::FLOAT32);
|
|
kernel->OutputAt(2).SetDataType(phi::DataType::FLOAT32);
|
|
kernel->OutputAt(3).SetDataType(phi::DataType::FLOAT32);
|
|
kernel->OutputAt(4).SetDataType(phi::DataType::FLOAT32);
|
|
kernel->OutputAt(5).SetDataType(phi::DataType::FLOAT32);
|
|
kernel->OutputAt(6).SetDataType(phi::DataType::FLOAT32);
|
|
}
|
|
kernel->OutputAt(4).SetBackend(phi::Backend::UNDEFINED);
|
|
kernel->OutputAt(5).SetBackend(phi::Backend::UNDEFINED);
|
|
}
|