156 lines
6.5 KiB
C++
156 lines
6.5 KiB
C++
// Copyright (c) 2024 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include "paddle/phi/backends/context_pool.h"
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#include "paddle/phi/core/dense_tensor.h"
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#include "paddle/phi/core/kernel_factory.h"
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#include "paddle/phi/core/visit_type.h"
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#include "paddle/phi/kernels/contiguous_kernel.h"
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#include "paddle/phi/kernels/fill_kernel.h"
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#include "paddle/phi/kernels/strided_copy_kernel.h"
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namespace phi {
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template <typename T>
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inline void StridedTensorCopy(const DenseTensor& input,
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const std::vector<int64_t>& dims,
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const std::vector<int64_t>& out_stride,
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int64_t offset,
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DenseTensor* out) {
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auto& pool = DeviceContextPool::Instance();
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if (input.place().GetType() == AllocationType::CPU) {
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auto* dev_ctx = static_cast<CPUContext*>(pool.Get(input.place()));
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phi::StridedCopyKernel<T, CPUContext>(
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*dev_ctx, input, dims, out_stride, offset, out);
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#if defined(PADDLE_WITH_CUDA) || defined(PADDLE_WITH_HIP)
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} else if (input.place().GetType() == AllocationType::GPU) {
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auto* dev_ctx = static_cast<GPUContext*>(pool.Get(input.place()));
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phi::StridedCopyKernel<T, GPUContext>(
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*dev_ctx, input, dims, out_stride, offset, out);
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#endif
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#ifdef PADDLE_WITH_XPU
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} else if (input.place().GetType() == AllocationType::XPU) {
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auto* dev_ctx = static_cast<XPUContext*>(pool.Get(input.place()));
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phi::StridedCopyKernel<T, XPUContext>(
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*dev_ctx, input, dims, out_stride, offset, out);
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#endif
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#ifdef PADDLE_WITH_CUSTOM_DEVICE
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} else if (input.place().GetType() == AllocationType::CUSTOM) {
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auto* dev_ctx = static_cast<phi::CustomContext*>(pool.Get(input.place()));
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const phi::KernelKey& strided_copy_key = {
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phi::TransToPhiBackend(dev_ctx->GetPlace()),
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DataLayout::ALL_LAYOUT,
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input.dtype()};
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using strided_copy_signature = void (*)(const DeviceContext&,
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const DenseTensor&,
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const std::vector<int64_t>&,
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const std::vector<int64_t>&,
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int64_t,
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DenseTensor*);
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PD_VISIT_KERNEL("strided_copy",
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strided_copy_key,
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strided_copy_signature,
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false,
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*dev_ctx,
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input,
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dims,
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out_stride,
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offset,
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out);
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#endif
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} else {
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PADDLE_THROW(common::errors::Unimplemented(
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"Place type is not supported when `strided_copy` kernel is called."));
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}
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}
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template <typename T>
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inline void StridedTensorFill(const DenseTensor& x,
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const phi::Scalar& value,
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DenseTensor* out) {
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auto& pool = DeviceContextPool::Instance();
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if (x.place().GetType() == AllocationType::CPU) {
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auto* dev_ctx = static_cast<CPUContext*>(pool.Get(x.place()));
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phi::FillKernel<T, CPUContext>(*dev_ctx, x, value, out);
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#if defined(PADDLE_WITH_CUDA) || defined(PADDLE_WITH_HIP)
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} else if (x.place().GetType() == AllocationType::GPU) {
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auto* dev_ctx = static_cast<GPUContext*>(pool.Get(x.place()));
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phi::FillKernel<T, GPUContext>(*dev_ctx, x, value, out);
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#endif
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#ifdef PADDLE_WITH_XPU
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} else if (x.place().GetType() == AllocationType::XPU) {
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auto* dev_ctx = static_cast<XPUContext*>(pool.Get(x.place()));
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phi::FillKernel<T, XPUContext>(*dev_ctx, x, value, out);
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#endif
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#ifdef PADDLE_WITH_CUSTOM_DEVICE
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} else if (x.place().GetType() == AllocationType::CUSTOM) {
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auto* dev_ctx = static_cast<phi::CustomContext*>(pool.Get(x.place()));
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const phi::KernelKey& fill_key = {
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phi::TransToPhiBackend(dev_ctx->GetPlace()),
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DataLayout::ALL_LAYOUT,
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x.dtype()};
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using fill_signature = void (*)(const DeviceContext&,
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const DenseTensor&,
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const phi::Scalar&,
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DenseTensor*);
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PD_VISIT_KERNEL(
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"fill", fill_key, fill_signature, false, *dev_ctx, x, value, out);
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#endif
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} else {
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PADDLE_THROW(common::errors::Unimplemented(
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"Place type is not supported when `fill` kernel is called."));
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}
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}
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template <typename T>
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inline void StridedTensorContiguous(const DenseTensor& input,
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DenseTensor* out) {
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auto& pool = DeviceContextPool::Instance();
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if (input.place().GetType() == AllocationType::CPU) {
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auto* dev_ctx = static_cast<CPUContext*>(pool.Get(input.place()));
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ContiguousKernel<T, CPUContext>(*dev_ctx, input, out);
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#if defined(PADDLE_WITH_CUDA) || defined(PADDLE_WITH_HIP)
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} else if (input.place().GetType() == AllocationType::GPU) {
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auto* dev_ctx = static_cast<GPUContext*>(pool.Get(input.place()));
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ContiguousKernel<T, GPUContext>(*dev_ctx, input, out);
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#endif
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#ifdef PADDLE_WITH_XPU
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} else if (input.place().GetType() == AllocationType::XPU) {
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auto* dev_ctx = static_cast<XPUContext*>(pool.Get(input.place()));
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ContiguousKernel<T, XPUContext>(*dev_ctx, input, out);
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#endif
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#ifdef PADDLE_WITH_CUSTOM_DEVICE
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} else if (input.place().GetType() == AllocationType::CUSTOM) {
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auto* dev_ctx = static_cast<phi::CustomContext*>(pool.Get(input.place()));
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const phi::KernelKey& contiguous_key = {
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phi::TransToPhiBackend(dev_ctx->GetPlace()),
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DataLayout::ALL_LAYOUT,
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input.dtype()};
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using contiguous_signature =
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void (*)(const DeviceContext&, const DenseTensor&, DenseTensor*);
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PD_VISIT_KERNEL("contiguous",
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contiguous_key,
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contiguous_signature,
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false,
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*dev_ctx,
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input,
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out);
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#endif
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} else {
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PADDLE_THROW(common::errors::Unimplemented(
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"Place type is not supported when `contiguous` kernel is called."));
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}
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}
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} // namespace phi
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