wehub-resource-sync
362 lines
15 KiB
Plaintext
362 lines
15 KiB
Plaintext
// Copyright (c) 2024 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/funcs/math/unpooling.h"
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#include "paddle/phi/backends/gpu/gpu_primitives.h"
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namespace phi {
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namespace math {
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template <typename T>
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__global__ void KernelUnpool2dMax(const int64_t nthreads,
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const T* input_data,
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const int* indices_data,
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const int input_height,
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const int input_width,
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const int channels,
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T* output_data,
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const int output_height,
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const int output_width) {
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CUDA_KERNEL_LOOP_TYPE(linearIndex, nthreads, int64_t) {
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int64_t c = (linearIndex / input_width / input_height) % channels;
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int64_t n = linearIndex / input_width / input_height / channels;
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output_data += (n * channels + c) * output_height * output_width;
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int maxind = indices_data[linearIndex];
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output_data[maxind] = input_data[linearIndex];
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}
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}
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template <typename T>
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__global__ void KernelUnpool2dMaxGrad(const int64_t nthreads,
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const T* input_data,
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const int* indices_data,
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const int input_height,
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const int input_width,
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const int channels,
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const T* output_data,
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const T* output_grad,
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const int output_height,
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const int output_width,
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T* input_grad) {
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CUDA_KERNEL_LOOP_TYPE(linearIndex, nthreads, int64_t) {
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int64_t c = (linearIndex / input_width / input_height) % channels;
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int64_t n = linearIndex / input_width / input_height / channels;
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output_grad += (n * channels + c) * output_height * output_width;
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int maxind = indices_data[linearIndex];
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input_grad[linearIndex] = output_grad[maxind];
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}
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}
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/*
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* All tensors are in NCHW format.
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*/
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template <typename T>
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__global__ void KernelUnpool3dMax(const int64_t nthreads,
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const T* input_data,
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const int* indices_data,
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const int input_depth,
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const int input_height,
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const int input_width,
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const int channels,
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T* output_data,
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const int output_depth,
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const int output_height,
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const int output_width) {
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CUDA_KERNEL_LOOP_TYPE(linearIndex, nthreads, int64_t) {
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int64_t c =
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(linearIndex / input_depth / input_width / input_height) % channels;
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int64_t n =
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linearIndex / input_depth / input_width / input_height / channels;
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output_data +=
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(n * channels + c) * output_depth * output_height * output_width;
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int maxind = indices_data[linearIndex];
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output_data[maxind] = input_data[linearIndex];
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}
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}
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template <typename T>
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__global__ void KernelUnpool3dMaxGrad(const int64_t nthreads,
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const T* input_data,
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const int* indices_data,
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const int input_depth,
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const int input_height,
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const int input_width,
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const int channels,
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const T* output_data,
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const T* output_grad,
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const int output_depth,
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const int output_height,
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const int output_width,
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T* input_grad) {
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CUDA_KERNEL_LOOP_TYPE(linearIndex, nthreads, int64_t) {
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int64_t c =
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(linearIndex / input_depth / input_width / input_height) % channels;
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int64_t n =
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linearIndex / input_depth / input_width / input_height / channels;
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output_grad +=
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(n * channels + c) * output_depth * output_height * output_width;
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int maxind = indices_data[linearIndex];
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input_grad[linearIndex] = output_grad[maxind];
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}
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}
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/*
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* All tensors are in NCDHW format.
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*/
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template <typename T>
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class Unpool2dMaxFunctor<GPUContext, T> {
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public:
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void operator()(const GPUContext& context,
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const DenseTensor& input,
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const DenseTensor& indices,
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DenseTensor* output) {
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t batch_size = input.dims()[0];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_height = input.dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_width = input.dims()[3];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_channels = output->dims()[1];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_height = output->dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_width = output->dims()[3];
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const T* input_data = input.data<T>();
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const int* indices_data = indices.data<int>();
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T* output_data = context.template Alloc<T>(output);
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int threads = 1024;
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int64_t max_grid = context.GetCUDAMaxGridDimSize()[0];
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int grid = std::min((input.numel() + threads - 1) / threads, max_grid);
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KernelUnpool2dMax<T>
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<<<grid, threads, 0, context.stream()>>>(input.numel(),
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input_data,
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indices_data,
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input_height,
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input_width,
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output_channels,
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output_data,
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output_height,
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output_width);
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}
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};
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/*
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* All tensors are in NCHW format.
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*/
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template <typename T>
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class Unpool2dMaxGradFunctor<GPUContext, T> {
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public:
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void operator()(const GPUContext& context,
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const DenseTensor& input,
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const DenseTensor& indices,
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const DenseTensor& output,
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const DenseTensor& output_grad,
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DenseTensor* input_grad) {
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t batch_size = input.dims()[0];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_height = input.dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_width = input.dims()[3];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_channels = output.dims()[1];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_height = output.dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_width = output.dims()[3];
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const T* input_data = input.data<T>();
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const int* indices_data = indices.data<int>();
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const T* output_data = output.data<T>();
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const T* output_grad_data = output_grad.data<T>();
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T* input_grad_data = context.template Alloc<T>(input_grad);
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int threads = 1024;
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int64_t max_grid = context.GetCUDAMaxGridDimSize()[0];
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int grid = std::min((input.numel() + threads - 1) / threads, max_grid);
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KernelUnpool2dMaxGrad<T>
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<<<grid, threads, 0, context.stream()>>>(input.numel(),
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input_data,
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indices_data,
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input_height,
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input_width,
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output_channels,
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output_data,
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output_grad_data,
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output_height,
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output_width,
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input_grad_data);
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}
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};
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template <typename T>
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class Unpool3dMaxFunctor<GPUContext, T> {
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public:
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void operator()(const GPUContext& context,
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const DenseTensor& input,
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const DenseTensor& indices,
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DenseTensor* output) {
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t batch_size = input.dims()[0];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_depth = input.dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_height = input.dims()[3];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_width = input.dims()[4];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_channels = output->dims()[1];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_depth = output->dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_height = output->dims()[3];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_width = output->dims()[4];
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const T* input_data = input.data<T>();
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const int* indices_data = indices.data<int>();
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T* output_data = context.template Alloc<T>(output);
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int threads = 1024;
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int64_t max_grid = context.GetCUDAMaxGridDimSize()[0];
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int grid = std::min((input.numel() + threads - 1) / threads, max_grid);
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KernelUnpool3dMax<T>
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<<<grid, threads, 0, context.stream()>>>(input.numel(),
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input_data,
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indices_data,
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input_depth,
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input_height,
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input_width,
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output_channels,
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output_data,
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output_depth,
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output_height,
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output_width);
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}
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};
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/*
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* All tensors are in NCDHW format.
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*/
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template <typename T>
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class Unpool3dMaxGradFunctor<GPUContext, T> {
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public:
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void operator()(const GPUContext& context,
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const DenseTensor& input,
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const DenseTensor& indices,
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const DenseTensor& output,
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const DenseTensor& output_grad,
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DenseTensor* input_grad) {
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t batch_size = input.dims()[0];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_depth = input.dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_height = input.dims()[3];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t input_width = input.dims()[4];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_channels = output.dims()[1];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_depth = output.dims()[2];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_height = output.dims()[3];
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// TODO(large-tensor): downstream functors may still use int; guard until
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// upgraded.
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int64_t output_width = output.dims()[4];
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const T* input_data = input.data<T>();
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const int* indices_data = indices.data<int>();
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const T* output_data = output.data<T>();
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const T* output_grad_data = output_grad.data<T>();
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T* input_grad_data = context.template Alloc<T>(input_grad);
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int threads = 1024;
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int64_t max_grid = context.GetCUDAMaxGridDimSize()[0];
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int grid = std::min((input.numel() + threads - 1) / threads, max_grid);
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KernelUnpool3dMaxGrad<T>
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<<<grid, threads, 0, context.stream()>>>(input.numel(),
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input_data,
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indices_data,
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input_depth,
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input_height,
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input_width,
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output_channels,
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output_data,
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output_grad_data,
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output_depth,
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output_height,
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output_width,
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input_grad_data);
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}
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};
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template class Unpool2dMaxGradFunctor<GPUContext, float>;
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template class Unpool2dMaxGradFunctor<GPUContext, double>;
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template class Unpool2dMaxFunctor<GPUContext, float>;
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template class Unpool2dMaxFunctor<GPUContext, double>;
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template class Unpool3dMaxGradFunctor<GPUContext, float>;
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template class Unpool3dMaxGradFunctor<GPUContext, double>;
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template class Unpool3dMaxFunctor<GPUContext, float>;
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template class Unpool3dMaxFunctor<GPUContext, double>;
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} // namespace math
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} // namespace phi
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