262 lines
9.4 KiB
C++
262 lines
9.4 KiB
C++
/* Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/fluid/inference/tensorrt/convert/op_converter.h"
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#include "paddle/fluid/inference/tensorrt/engine.h"
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#include "paddle/phi/common/data_type.h"
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namespace paddle::framework {
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class Scope;
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} // namespace paddle::framework
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namespace paddle::framework::proto {
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class OpDesc;
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} // namespace paddle::framework::proto
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namespace paddle::inference::tensorrt {
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template <typename RegisterFunc, typename SetDilationFunc>
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void ConvertConv2d(TensorRTEngine* engine,
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const framework::proto::OpDesc& op,
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const framework::Scope& scope,
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bool test_mode,
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RegisterFunc fadd_layer,
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SetDilationFunc fset_dilation,
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const std::string& name) {
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VLOG(3) << "convert a " << name << " op to tensorrt layer without bias";
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framework::OpDesc op_desc(op, nullptr);
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auto* X = engine->GetITensor(op_desc.Input("Input").front());
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std::string filter_var_name = op_desc.Input("Filter").front();
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auto* Y_v = scope.FindVar(filter_var_name);
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phi::DenseTensor* Y_t = nullptr;
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nvinfer1::ITensor* filter = nullptr;
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int n_output;
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int n_input;
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int filter_h;
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int filter_w;
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if (Y_v) {
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Y_t = Y_v->GetMutable<phi::DenseTensor>();
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PADDLE_ENFORCE_EQ(
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Y_t->dims().size(),
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4UL,
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common::errors::InvalidArgument(
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"The conv2d filter's dims size should be 4, but got %d",
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Y_t->dims().size()));
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n_output = Y_t->dims()[0];
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n_input = Y_t->dims()[1];
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filter_h = Y_t->dims()[2];
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filter_w = Y_t->dims()[3];
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} else {
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filter = engine->GetITensor(op_desc.Input("Filter").front());
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PADDLE_ENFORCE_EQ(
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filter->getDimensions().nbDims,
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4UL,
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common::errors::InvalidArgument(
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"The conv2d filter's dims size should be 4, but got %d",
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filter->getDimensions().nbDims));
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n_output = filter->getDimensions().d[0];
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n_input = filter->getDimensions().d[1];
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filter_h = filter->getDimensions().d[2];
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filter_w = filter->getDimensions().d[3];
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}
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bool enable_int8 = op_desc.HasAttr("enable_int8");
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if (enable_int8) {
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float in_scale = PADDLE_GET_CONST(float, op_desc.GetAttr("Input_scale"));
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engine->SetTensorDynamicRange(X, in_scale);
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}
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const int groups = PADDLE_GET_CONST(int, op_desc.GetAttr("groups"));
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const std::vector<int> dilations =
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PADDLE_GET_CONST(std::vector<int>, op_desc.GetAttr("dilations"));
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const std::vector<int> strides =
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PADDLE_GET_CONST(std::vector<int>, op_desc.GetAttr("strides"));
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std::vector<int> paddings =
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PADDLE_GET_CONST(std::vector<int>, op_desc.GetAttr("paddings"));
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// for conv2d_transpose
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std::vector<int> output_padding;
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if (op_desc.HasAttr("output_padding")) {
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output_padding =
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PADDLE_GET_CONST(std::vector<int>, op_desc.GetAttr("output_padding"));
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}
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std::string padding_algorithm = "EXPLICIT";
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if (op_desc.HasAttr("padding_algorithm"))
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padding_algorithm =
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PADDLE_GET_CONST(std::string, op_desc.GetAttr("padding_algorithm"));
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if (padding_algorithm == "VALID") {
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for (size_t i = 0; i < paddings.size(); i++) {
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paddings[i] = 0;
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}
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}
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nvinfer1::DimsHW nv_ksize(filter_h, filter_w);
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nvinfer1::DimsHW nv_dilations(dilations[0], dilations[1]);
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nvinfer1::DimsHW nv_strides(strides[0], strides[1]);
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nvinfer1::DimsHW nv_pre_paddings;
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nvinfer1::DimsHW nv_post_paddings;
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if (paddings.size() == 2) {
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nv_pre_paddings.d[0] = paddings[0];
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nv_pre_paddings.d[1] = paddings[1];
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nv_post_paddings.d[0] = paddings[0];
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nv_post_paddings.d[1] = paddings[1];
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} else {
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nv_pre_paddings.d[0] = paddings[0];
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nv_pre_paddings.d[1] = paddings[2];
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nv_post_paddings.d[0] = paddings[1];
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nv_post_paddings.d[1] = paddings[3];
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}
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TensorRTEngine::Weight weight(nvinfer1::DataType::kFLOAT, nullptr, 0);
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if (Y_v) {
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weight = engine->GetTrtWeight(op_desc.Input("Filter").front(), *Y_t);
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}
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TensorRTEngine::Weight bias;
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bias.SetDataType(weight.get().type);
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bias.SetCount(0);
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bias.SetValues(nullptr);
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if (op_desc.Type() == "fused_conv2d_add_act") {
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auto* bias_tensor = scope.GetVar(op_desc.Input("Bias").front());
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auto* bias_tensor_data = bias_tensor->GetMutable<phi::DenseTensor>();
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bias =
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engine->GetTrtWeight(op_desc.Input("Bias").front(), *bias_tensor_data);
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}
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// In conv2d_transpose and depthwise_conv2d_transpose,
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// output channels = filter_dims[1] * groups
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auto* layer = (op_desc.Type() == "conv2d_transpose" ||
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op_desc.Type() == "depthwise_conv2d_transpose")
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? fadd_layer(const_cast<nvinfer1::ITensor*>(X),
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n_input * groups,
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nv_ksize,
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weight,
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bias)
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: fadd_layer(const_cast<nvinfer1::ITensor*>(X),
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n_output,
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nv_ksize,
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weight,
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bias);
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PADDLE_ENFORCE_NOT_NULL(
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layer,
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common::errors::Fatal("TensorRT create conv2d/conv2d_transpose"
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" layer failed."));
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layer->setStrideNd(nv_strides);
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layer->setPrePadding(nv_pre_paddings);
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if (!Y_v) layer->setInput(1, *filter);
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if (!output_padding.empty()) {
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nv_post_paddings.d[0] -= output_padding[0];
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nv_post_paddings.d[1] -= output_padding[1];
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}
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if (nv_post_paddings.d[0] < 0 || nv_post_paddings.d[1] < 0) {
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PADDLE_THROW(common::errors::Fatal(
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"The value in conv2d_transpose's PostPadding should be >= 0."));
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}
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layer->setPostPadding(nv_post_paddings);
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layer->setNbGroups(groups);
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if (padding_algorithm == "SAME") {
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layer->setPaddingMode(nvinfer1::PaddingMode::kSAME_UPPER);
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nv_dilations.d[0] = 1;
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nv_dilations.d[1] = 1;
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}
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// set dilations
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fset_dilation(layer, nv_dilations);
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auto output_name = op_desc.Output("Output").front();
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layer->setName((name + " (Output: " + output_name + ")").c_str());
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layer->getOutput(0)->setName(output_name.c_str());
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engine->SetITensor(output_name, layer->getOutput(0));
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if (test_mode) {
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engine->DeclareOutput(output_name);
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}
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}
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class Conv2dOpConverter : public OpConverter {
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public:
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void operator()(const framework::proto::OpDesc& op,
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const framework::Scope& scope,
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bool test_mode) override {
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framework::OpDesc op_desc(op, nullptr);
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auto output_name = op_desc.Output("Output").front();
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ConvertConv2d(
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engine_,
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op,
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scope,
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test_mode,
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[&](nvinfer1::ITensor* inputs,
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int n_output, /* Conv output maps */
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nvinfer1::DimsHW& ksize,
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TensorRTEngine::Weight& weight,
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TensorRTEngine::Weight& bias) -> nvinfer1::IConvolutionLayer* {
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auto* layer = TRT_ENGINE_ADD_LAYER(engine_,
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ConvolutionNd,
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*inputs,
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n_output,
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ksize,
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weight.get(),
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bias.get());
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SupportFP32MixPrecision(output_name, op_desc.Type(), layer);
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return layer;
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},
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[](nvinfer1::IConvolutionLayer* layer, nvinfer1::DimsHW& dilations) {
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layer->setDilationNd(dilations);
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},
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"conv2d");
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}
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};
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class Deconv2dOpConverter : public OpConverter {
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public:
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void operator()(const framework::proto::OpDesc& op,
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const framework::Scope& scope,
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bool test_mode) override {
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framework::OpDesc op_desc(op, nullptr);
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auto output_name = op_desc.Output("Output").front();
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ConvertConv2d(
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engine_,
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op,
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scope,
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test_mode,
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[&](nvinfer1::ITensor* inputs,
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int n_output, /* Deconv input maps */
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nvinfer1::DimsHW& ksize,
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TensorRTEngine::Weight& weight,
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TensorRTEngine::Weight& bias) -> nvinfer1::IDeconvolutionLayer* {
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auto* layer = TRT_ENGINE_ADD_LAYER(engine_,
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DeconvolutionNd,
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*inputs,
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n_output,
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ksize,
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weight.get(),
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bias.get());
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SupportFP32MixPrecision(output_name, op_desc.Type(), layer);
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return layer;
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},
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[](nvinfer1::IDeconvolutionLayer* layer, nvinfer1::DimsHW& dilations) {
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},
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"conv2d_transpose");
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}
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};
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} // namespace paddle::inference::tensorrt
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REGISTER_TRT_OP_CONVERTER(conv2d, Conv2dOpConverter);
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REGISTER_TRT_OP_CONVERTER(fused_conv2d_add_act, Conv2dOpConverter);
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REGISTER_TRT_OP_CONVERTER(conv2d_transpose, Deconv2dOpConverter);
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