wehub-resource-sync
348 lines
14 KiB
C++
348 lines
14 KiB
C++
// Copyright (c) 2025 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/index_elementwise_put_kernel.h"
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#include "paddle/phi/backends/xpu/xpu_context.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/index_elementwise.h"
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#include "paddle/phi/kernels/funcs/stride_utils.h"
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namespace phi {
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template <typename T, typename Context, typename IndexT = int>
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void XPUIndexElementwisePutWithTensorKernel(
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const Context& dev_ctx,
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const DenseTensor& input,
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const DenseTensor& value,
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const std::vector<const DenseTensor*>& index,
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const std::vector<int64_t>& input_dims,
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const std::vector<int64_t>& input_strides,
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const std::vector<int64_t>& index_dims,
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const std::vector<int64_t>& index_strides,
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const int64_t slice_offset,
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DenseTensor* output) {
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int64_t numel = 0;
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bool is_initialized = output->initialized();
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bool is_same_place = true;
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if (is_initialized) {
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is_same_place = (input.place() == output->place());
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}
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if (!is_initialized || !is_same_place) {
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Copy(dev_ctx, input, dev_ctx.GetPlace(), false, output);
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}
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int64_t num_indices = 0;
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std::vector<int64_t> shape_tmp;
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std::vector<int64_t> stride_tmp;
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funcs::cal_shape_stride(index_dims, &num_indices, &shape_tmp, &stride_tmp);
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auto sizes = std::array<int64_t, 25>{};
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auto strides = std::array<int64_t, 25>{};
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for (int64_t i = 0; i < num_indices; i++) {
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sizes[i] = index_dims[i];
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strides[i] = index_strides[i];
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}
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std::array<int64_t*, 3> strides_array;
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std::vector<int64_t> desired_shape;
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std::array<std::vector<int64_t>, 3> strides_vec;
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funcs::IndexPutStride<3>(input_dims,
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input_strides,
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phi::SizeOf(input.dtype()),
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vectorize<int64_t>(value.dims()),
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vectorize<int64_t>(value.strides()),
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phi::SizeOf(value.dtype()),
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shape_tmp,
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stride_tmp,
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phi::SizeOf(index[0]->dtype()),
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&desired_shape,
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&strides_array,
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&numel,
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strides_vec);
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const int64_t N = numel;
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PADDLE_ENFORCE_EQ(true,
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(N >= 0 && N <= std::numeric_limits<int32_t>::max()),
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common::errors::PreconditionNotMet(
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"the value of N should be in [0, "
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"std::numeric_limits<int32_t>::max()]"));
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dev_ctx.template Alloc<T>(output);
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using XPUType = typename XPUTypeTrait<T>::Type;
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using XPUTypeIndexT = typename XPUTypeTrait<IndexT>::Type;
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// passed vector params for XPU
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std::vector<const XPUTypeIndexT*> index_ptrs_vec;
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std::vector<int64_t> index_numel_vec;
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for (int i = 0; i < num_indices; i++) {
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// since XPU WRAPPER_CHECK_PTR only supports original GM ptrs, so we pass
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// the IndexT* type ptrs, which is different from the CPU/GPU's char* ptr.
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index_ptrs_vec.push_back(
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reinterpret_cast<const XPUTypeIndexT*>(index[i]->data<IndexT>()));
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// index_numel_vec is for the length of WRAPPER_CHECK_PTR
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index_numel_vec.push_back(index[i]->numel());
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}
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std::vector<int64_t> sizes_vec =
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std::vector<int64_t>(sizes.begin(), sizes.begin() + num_indices);
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std::vector<int64_t> orig_strides_vec =
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std::vector<int64_t>(strides.begin(), strides.begin() + num_indices);
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std::vector<std::vector<int64_t>> strides_vec_vec =
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std::vector<std::vector<int64_t>>(strides_vec.begin(), strides_vec.end());
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const char* in_ptr = reinterpret_cast<const char*>(value.data<T>());
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char* out_ptr = reinterpret_cast<char*>(output->data<T>()) + slice_offset;
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// for checkptr and checksum in XPU
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int64_t data_size_in = value.Holder()->size() - value.meta().offset;
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int64_t data_size_out = output->Holder()->size() - output->meta().offset;
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bool is_get = false;
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int r = xpu::index_elementwise_tensor<XPUType, XPUTypeIndexT>(
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dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(in_ptr), // XPU ptr
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reinterpret_cast<XPUType*>(out_ptr), // XPU ptr
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index_ptrs_vec, // vec of XPU ptrs
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input_dims, // CPU vec
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index_numel_vec, // CPU vec
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desired_shape, // CPU vec
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sizes_vec, // CPU vec
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orig_strides_vec, // CPU vec
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strides_vec_vec, // CPU vec
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N, // int64_t
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data_size_in, // int64_t
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data_size_out, // int64_t
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is_get); // true for get, false for put
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "index_elementwise_tensor_put");
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}
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template <typename T, typename Context, typename IndexT = int>
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void XPUIndexElementwisePutKernel(const Context& dev_ctx,
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const DenseTensor& input,
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const Scalar& value,
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const std::vector<const DenseTensor*>& index,
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const std::vector<int64_t>& input_dims,
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const std::vector<int64_t>& input_strides,
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const std::vector<int64_t>& index_dims,
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const std::vector<int64_t>& index_strides,
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const int64_t slice_offset,
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DenseTensor* output) {
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int64_t numel = 0;
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bool is_initialized = output->initialized();
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bool is_same_place = true;
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if (is_initialized) {
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is_same_place = (input.place() == output->place());
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}
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if (!is_initialized || !is_same_place) {
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Copy(dev_ctx, input, dev_ctx.GetPlace(), false, output);
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}
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int64_t num_indices = 0;
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std::vector<int64_t> shape_tmp;
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std::vector<int64_t> stride_tmp;
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funcs::cal_shape_stride(index_dims, &num_indices, &shape_tmp, &stride_tmp);
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auto sizes = std::array<int64_t, DDim::kMaxRank + 1>{};
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auto strides = std::array<int64_t, DDim::kMaxRank + 1>{};
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for (int64_t i = 0; i < num_indices; i++) {
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sizes[i] = index_dims[i];
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strides[i] = index_strides[i];
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}
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std::array<int64_t*, 3> strides_array;
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std::vector<int64_t> desired_shape;
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std::array<std::vector<int64_t>, 3> strides_vec;
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funcs::IndexPutStride<3>(input_dims,
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input_strides,
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phi::SizeOf(input.dtype()),
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{},
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{},
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4,
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shape_tmp,
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stride_tmp,
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phi::SizeOf(index[0]->dtype()),
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&desired_shape,
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&strides_array,
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&numel,
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strides_vec);
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const int64_t N = numel;
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PADDLE_ENFORCE_EQ(true,
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(N >= 0 && N <= std::numeric_limits<int32_t>::max()),
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common::errors::PreconditionNotMet(
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"the value of N should be in [0, "
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"std::numeric_limits<int32_t>::max()]"));
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dev_ctx.template Alloc<T>(output);
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using XPUType = typename XPUTypeTrait<T>::Type;
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using XPUTypeIndexT = typename XPUTypeTrait<IndexT>::Type;
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// passed vector params for XPU
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std::vector<const XPUTypeIndexT*> index_ptrs_vec;
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std::vector<int64_t> index_numel_vec;
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for (int i = 0; i < std::min(num_indices, (int64_t)index.size()); i++) {
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// since XPU WRAPPER_CHECK_PTR only supports original GM ptrs, so we pass
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// the IndexT* type ptrs, which is different from the CPU/GPU's char* ptr.
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index_ptrs_vec.push_back(
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reinterpret_cast<const XPUTypeIndexT*>(index[i]->data<IndexT>()));
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// index_numel_vec is for the length of WRAPPER_CHECK_PTR
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index_numel_vec.push_back(index[i]->numel());
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}
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std::vector<int64_t> sizes_vec =
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std::vector<int64_t>(sizes.begin(), sizes.begin() + num_indices);
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std::vector<int64_t> orig_strides_vec =
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std::vector<int64_t>(strides.begin(), strides.begin() + num_indices);
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std::vector<std::vector<int64_t>> strides_vec_vec =
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std::vector<std::vector<int64_t>>(strides_vec.begin(), strides_vec.end());
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char* out_ptr = reinterpret_cast<char*>(output->data<T>()) + slice_offset;
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// for checkptr and checksum in XPU
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int64_t data_size_out = output->Holder()->size() - output->meta().offset;
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const XPUType value_T = static_cast<XPUType>(value.to<T>());
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bool is_get = false;
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// bool and int64_t index will be handled in XPU's op wrapper
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int r = xpu::index_elementwise_scalar<XPUType, XPUTypeIndexT>(
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dev_ctx.x_context(),
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reinterpret_cast<XPUType*>(out_ptr), // XPU ptr
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value_T, // scalar
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index_ptrs_vec, // vec of XPU ptrs
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input_dims, // CPU vec
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index_numel_vec, // CPU vec
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desired_shape, // CPU vec
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sizes_vec, // CPU vec
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orig_strides_vec, // CPU vec
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strides_vec_vec, // CPU vec
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N, // int64_t
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data_size_out, // int64_t
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is_get); // false for put
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "index_elementwise_scalar_put");
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}
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template <typename T, typename Context>
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void IndexElementwisePutWithTensorKernel(
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const Context& dev_ctx,
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const DenseTensor& x,
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const std::vector<const DenseTensor*>& index,
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const DenseTensor& value,
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const std::vector<int64_t>& input_dims,
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const std::vector<int64_t>& input_strides,
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const std::vector<int64_t>& index_dims,
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const std::vector<int64_t>& index_strides,
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const int64_t slice_offset,
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DenseTensor* out) {
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const auto& index_type = index[0]->dtype();
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PADDLE_ENFORCE_EQ(index_type == DataType::INT64,
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true,
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common::errors::InvalidArgument(
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"Index holds the wrong type, it holds [%s], but "
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"desires to be [%s].",
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index_type,
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DataType::INT64));
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if (out && out->numel() == 0) {
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dev_ctx.template Alloc<T>(out);
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return;
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}
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if (index.empty()) {
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if (!out->initialized()) {
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Copy(dev_ctx, x, dev_ctx.GetPlace(), false, out);
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}
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return;
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}
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if (out->numel() == 0) return;
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XPUIndexElementwisePutWithTensorKernel<T, Context, int64_t>(dev_ctx,
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x,
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value,
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index,
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input_dims,
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input_strides,
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index_dims,
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index_strides,
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slice_offset,
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out);
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}
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template <typename T, typename Context>
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void IndexElementwisePutKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const std::vector<const DenseTensor*>& index,
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const Scalar& value,
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const std::vector<int64_t>& input_dims,
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const std::vector<int64_t>& input_strides,
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const std::vector<int64_t>& index_dims,
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const std::vector<int64_t>& index_strides,
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const int64_t slice_offset,
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DenseTensor* out) {
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const auto& index_type = index[0]->dtype();
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PADDLE_ENFORCE_EQ(index_type == DataType::INT64 ||
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(index_type == DataType::BOOL && index.size() == 1),
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true,
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common::errors::InvalidArgument(
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"Index holds the wrong type, it holds [%s], but "
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"desires to be [%s].",
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index_type,
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DataType::INT64));
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if (out && out->numel() == 0) {
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dev_ctx.template Alloc<T>(out);
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return;
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}
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if (index.empty()) {
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if (!out->initialized()) {
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Copy(dev_ctx, x, dev_ctx.GetPlace(), false, out);
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}
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return;
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}
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if (out->numel() == 0) return;
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XPUIndexElementwisePutKernel<T, Context, int64_t>(dev_ctx,
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x,
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value,
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index,
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input_dims,
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input_strides,
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index_dims,
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index_strides,
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slice_offset,
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out);
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}
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} // namespace phi
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PD_REGISTER_KERNEL(index_elementwise_put,
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XPU,
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ALL_LAYOUT,
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phi::IndexElementwisePutKernel,
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bool,
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float,
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double,
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int,
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int8_t,
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int64_t,
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int16_t,
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uint8_t,
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phi::float16,
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phi::bfloat16) {}
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PD_REGISTER_KERNEL(index_elementwise_put_with_tensor,
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XPU,
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ALL_LAYOUT,
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phi::IndexElementwisePutWithTensorKernel,
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bool,
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float,
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double,
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int,
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int8_t,
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int64_t,
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int16_t,
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uint8_t,
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phi::float16,
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phi::bfloat16) {}
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