99 lines
3.4 KiB
Plaintext
99 lines
3.4 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/mode_grad_kernel.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/math_function.h"
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#include "paddle/phi/kernels/funcs/mode.h"
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namespace phi {
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template <typename T>
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__global__ void AssignGradWithAxis(const T* grad_out,
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const int64_t* indices,
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T* grad_in,
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int64_t pre,
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int64_t post,
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int64_t raw_height,
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int k) {
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// raw_height is the length of topk axis
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for (int64_t i = blockIdx.x; i < pre; i += gridDim.x) {
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int64_t base_index = i * post * k;
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int64_t base_grad = i * post * raw_height;
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for (int j = threadIdx.x; j < raw_height * post; j += blockDim.x) {
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grad_in[base_grad + j] = static_cast<T>(0);
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}
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__syncthreads();
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for (int64_t j = threadIdx.x; j < k * post; j += blockDim.x) {
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int64_t idx_ij = indices[base_index + j];
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int64_t in_ij = base_grad + (idx_ij * post) + (j % post);
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grad_in[in_ij] = grad_out[base_index + j];
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}
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}
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}
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template <typename T, typename Context>
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void ModeGradKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& indices,
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const DenseTensor& out_grad,
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int axis,
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bool keepdim,
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DenseTensor* x_grad) {
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const auto& in_dims = x.dims();
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auto out_dims = indices.dims();
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if (axis < 0) axis += in_dims.size();
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// allocate the cuda memory for the x_grad
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T* x_grad_data = dev_ctx.template Alloc<T>(x_grad);
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const T* out_grad_data = out_grad.data<T>();
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const int64_t* indices_data = indices.data<int64_t>();
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if (x_grad && x_grad->numel() == 0) {
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return;
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}
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// For 0D Tensor
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if (in_dims.size() == 0) {
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funcs::set_constant(dev_ctx, x_grad, static_cast<T>(1.0));
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return;
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}
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int64_t pre, n, post;
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funcs::GetDims(in_dims, axis, &pre, &n, &post);
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// calculate the block and grid num
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int64_t block_size = funcs::ComputeBlockSize(post);
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int64_t max_threads = dev_ctx.GetMaxPhysicalThreadCount();
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const int64_t max_blocks =
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std::max(((max_threads - 1) / block_size + 1), static_cast<int64_t>(1));
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int64_t grid_size = std::min(max_blocks, pre);
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AssignGradWithAxis<T><<<grid_size, block_size, 64 * 4, dev_ctx.stream()>>>(
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out_grad_data, indices_data, x_grad_data, pre, post, n, 1);
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}
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} // namespace phi
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PD_REGISTER_KERNEL(mode_grad,
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GPU,
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ALL_LAYOUT,
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phi::ModeGradKernel,
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float,
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double,
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int32_t,
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int64_t,
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phi::float16,
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phi::bfloat16) {}
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