wehub-resource-sync
101 lines
3.8 KiB
Python
101 lines
3.8 KiB
Python
# Copyright (c) 2024 PaddlePaddle Authors. All Rights Reserved
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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import numpy as np
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import tensorrt as trt
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from paddle.tensorrt.converter_utils import (
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add_elementwise_layer,
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set_layer_name,
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unary_op_converter,
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)
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from paddle.tensorrt.register import converter_registry
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logic_type_map = {
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"pd_op.greater_than": trt.ElementWiseOperation.GREATER,
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"pd_op.less_than": trt.ElementWiseOperation.LESS,
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"pd_op.equal": trt.ElementWiseOperation.EQUAL,
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"pd_op.bitwise_and": trt.ElementWiseOperation.AND,
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"pd_op.bitwise_or": trt.ElementWiseOperation.OR,
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"pd_op.logical_xor": trt.ElementWiseOperation.XOR,
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"pd_op.logical_or": trt.ElementWiseOperation.OR,
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"pd_op.logical_or_": trt.ElementWiseOperation.OR,
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"pd_op.logical_and": trt.ElementWiseOperation.AND,
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}
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@converter_registry.register("pd_op.greater_than")
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@converter_registry.register("pd_op.less_than")
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@converter_registry.register("pd_op.equal")
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@converter_registry.register("pd_op.bitwise_and")
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@converter_registry.register("pd_op.bitwise_or")
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@converter_registry.register("pd_op.logical_xor")
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@converter_registry.register("pd_op.logical_or")
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@converter_registry.register("pd_op.logical_or_")
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@converter_registry.register("pd_op.logical_and")
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def logic_converter(network, paddle_op, inputs):
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layer_output = add_elementwise_layer(
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network, paddle_op, inputs, logic_type_map[paddle_op.name()]
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)
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return layer_output
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@converter_registry.register("pd_op.not_equal")
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def not_equal_converter(network, paddle_op, inputs):
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layer_output = add_elementwise_layer(
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network, paddle_op, inputs, trt.ElementWiseOperation.EQUAL
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)
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not_layer = network.add_unary(layer_output, trt.UnaryOperation.NOT)
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set_layer_name(not_layer, paddle_op)
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layer_output = not_layer.get_output(0)
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return layer_output
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@converter_registry.register("pd_op.bitwise_not")
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def bitwise_not_converter(network, paddle_op, inputs):
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input_tensor = inputs[0]
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if input_tensor.dtype == trt.bool:
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bitwise_not_layer = network.add_unary(
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input_tensor, trt.UnaryOperation.NOT
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)
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set_layer_name(bitwise_not_layer, paddle_op)
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layer_output = bitwise_not_layer.get_output(0)
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else:
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neg_one_tensor_dims = trt.Dims([1] * len(input_tensor.shape))
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neg_one_value = np.array([-1], dtype=np.int32)
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neg_one_weights = trt.Weights(neg_one_value)
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neg_one_tensor = network.add_constant(
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neg_one_tensor_dims, neg_one_weights
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)
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set_layer_name(neg_one_tensor, paddle_op)
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neg_one_tensor = neg_one_tensor.get_output(0)
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mul_neg_one = network.add_elementwise(
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input_tensor, neg_one_tensor, trt.ElementWiseOperation.PROD
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)
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set_layer_name(mul_neg_one, paddle_op)
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mul_neg_one = mul_neg_one.get_output(0)
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layer_output = network.add_elementwise(
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mul_neg_one, neg_one_tensor, trt.ElementWiseOperation.SUM
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)
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set_layer_name(layer_output, paddle_op)
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layer_output = layer_output.get_output(0)
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return layer_output
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@converter_registry.register("pd_op.logical_not")
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@converter_registry.register("pd_op.logical_not_")
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def logic_not_converter(network, paddle_op, inputs):
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layer_output = unary_op_converter(network, paddle_op, inputs)
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return layer_output
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