wehub-resource-sync
97 lines
3.7 KiB
C++
97 lines
3.7 KiB
C++
// Copyright (c) 2023 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/c_embedding_grad_kernel.h"
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#include "glog/logging.h"
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#include "paddle/phi/backends/xpu/enforce_xpu.h"
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#include "paddle/phi/core/kernel_registry.h"
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namespace phi {
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template <typename T, typename Context>
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void CEmbeddingGradKernel(const Context& dev_ctx,
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const DenseTensor& w,
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const DenseTensor& ids,
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const DenseTensor& out_grad,
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int64_t start_index,
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DenseTensor* w_grad) {
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#if defined(PADDLE_WITH_XPU_BKCL)
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w_grad->Resize(w.dims());
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dev_ctx.Alloc(w_grad, w.dtype());
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T* table_grad_data = static_cast<T*>(w_grad->data());
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using XPUType = typename XPUTypeTrait<T>::Type;
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size_t table_t_mem_size = w.numel() * phi::SizeOf(w_grad->dtype());
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size_t table_grad_t_mem_size = w_grad->numel() * phi::SizeOf(w_grad->dtype());
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VLOG(10) << "table_dims:" << w.dims()
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<< ", table_t memory_size:" << table_t_mem_size
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<< ", table_grad_t memory_size:" << table_grad_t_mem_size
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<< ", start_index:" << start_index;
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int r = xpu::constant(dev_ctx.x_context(),
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reinterpret_cast<XPUType*>(table_grad_data),
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w_grad->numel(),
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(XPUType)0);
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "constant");
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const T* d_output_data = out_grad.data<T>();
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const int64_t height = w.dims()[0];
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const int64_t width = w.dims()[1];
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const auto& index_type = ids.dtype();
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if (index_type == DataType::INT32) {
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r = xpu::embedding_grad(dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(d_output_data),
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ids.data<int32_t>(),
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reinterpret_cast<XPUType*>(table_grad_data),
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height,
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width,
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ids.numel(),
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-1,
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static_cast<int32_t>(start_index));
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} else if (index_type == DataType::INT64) {
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r = xpu::embedding_grad(dev_ctx.x_context(),
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reinterpret_cast<const XPUType*>(d_output_data),
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ids.data<int64_t>(),
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reinterpret_cast<XPUType*>(table_grad_data),
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height,
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width,
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ids.numel(),
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-1,
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static_cast<int64_t>(start_index));
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} else {
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PADDLE_THROW(common::errors::Unavailable(
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"XPU c_embedding ids only support int32 or int64."));
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}
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PADDLE_ENFORCE_XDNN_SUCCESS(r, "embedding_grad");
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#else
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PADDLE_THROW(common::errors::PreconditionNotMet(
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"PaddlePaddle is not compiled with DWITH_XPU_BKCL, please recompile with "
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"DWITH_XPU_BKCL for using c_embedding_grad."));
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#endif
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}
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} // namespace phi
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PD_REGISTER_KERNEL(c_embedding_grad,
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XPU,
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ALL_LAYOUT,
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phi::CEmbeddingGradKernel,
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float,
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phi::float16,
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phi::bfloat16) {}
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