461 lines
18 KiB
Plaintext
461 lines
18 KiB
Plaintext
/* Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License. */
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#include "paddle/phi/kernels/pool_grad_kernel.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/backends/gpu/gpu_dnn.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/math_function.h"
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#include "paddle/phi/kernels/funcs/pooling.h"
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#include "paddle/phi/kernels/gpudnn/pool_gpudnn.h"
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#include "paddle/phi/kernels/pool_kernel.h"
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#include "paddle/phi/kernels/impl/pool_grad_kernel_impl.h" // PoolGradRawGPUDNNKernel will call PoolGradRawKernel for pooling type "max" in ROCm
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namespace phi {
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template <typename T, typename Context>
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void PoolGradRawGPUDNNKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& out,
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const DenseTensor& dout,
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const std::vector<int64_t>& kernel_size,
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const std::vector<int64_t>& strides,
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const std::vector<int64_t>& paddings,
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bool exclusive,
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const std::string& data_format,
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const std::string& pooling_type,
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bool global_pooling,
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bool adaptive,
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const std::string& padding_algorithm,
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DenseTensor* dx) {
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PADDLE_ENFORCE_EQ(
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dev_ctx.GetPlace().GetType() == AllocationType::GPU,
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true,
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errors::InvalidArgument("Pool operator CUDA kernel must use CUDAPlace "
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"rather than CPUPlace."));
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if (dx && dx->numel() == 0) {
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dev_ctx.template Alloc<T>(dx);
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return;
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}
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auto run_cuda_kernel = [&]() {
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PoolGradRawKernel<T, GPUContext>(dev_ctx,
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x,
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out,
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dout,
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kernel_size,
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strides,
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paddings,
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exclusive,
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data_format,
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pooling_type,
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global_pooling,
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adaptive,
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padding_algorithm,
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0,
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dx);
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};
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if (std::max(x.numel(), out.numel()) > std::numeric_limits<int>::max()) {
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run_cuda_kernel();
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return;
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}
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const DenseTensor* input = &x;
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const DenseTensor* output = &out;
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const DenseTensor* output_grad = &dout;
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DenseTensor* input_grad = dx;
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std::vector<int> strides_(strides.begin(), strides.end());
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std::vector<int> paddings_(paddings.begin(), paddings.end());
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std::vector<int> kernel_size_(kernel_size.begin(), kernel_size.end());
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const bool channel_last = (data_format == "NHWC" || data_format == "NDHWC");
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#ifdef PADDLE_WITH_HIP
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if (pooling_type == "max") {
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run_cuda_kernel();
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return;
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}
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#endif
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// update paddings
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auto in_x_dims = input->dims();
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DDim data_dims;
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if (channel_last) {
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data_dims = slice_ddim(in_x_dims, 1, in_x_dims.size() - 1);
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} else {
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data_dims = slice_ddim(in_x_dims, 2, in_x_dims.size());
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}
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funcs::UpdatePadding(&paddings_,
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global_pooling,
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adaptive,
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padding_algorithm,
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data_dims,
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strides_,
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kernel_size_);
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if (data_dims.size() * 2 == static_cast<int>(paddings_.size())) {
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for (int i = 0; i < data_dims.size(); ++i) {
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paddings_.erase(paddings_.begin() + i + 1);
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}
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}
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if (global_pooling) {
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funcs::UpdateKernelSize(&kernel_size_, data_dims);
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}
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// ------- tensor grad --------------
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DenseTensor transformed_input(input->type());
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DenseTensor transformed_output(output->type());
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DenseTensor transformed_output_grad(output_grad->type());
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dev_ctx.template Alloc<T>(input_grad);
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DenseTensor transformed_input_grad(input_grad->type());
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DataLayout layout;
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const std::string str_NCHW = "NCHW", str_NHWC = "NHWC";
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const std::string str_NCDHW = "NCDHW", str_NDHWC = "NDHWC";
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if (data_format == str_NDHWC) {
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layout = DataLayout::NCDHW;
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std::vector<int> axis{0, 4, 1, 2, 3};
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// input
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transformed_input.Resize(input->dims());
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auto in_dims_vec = vectorize(input->dims());
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in_dims_vec[1] = input->dims()[4];
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in_dims_vec[2] = input->dims()[1];
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in_dims_vec[3] = input->dims()[2];
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in_dims_vec[4] = input->dims()[3];
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transformed_input.Resize(in_dims_vec);
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dev_ctx.Alloc(&transformed_input, input->type());
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funcs::Transpose<Context, T, 5> trans5;
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trans5(dev_ctx, *input, &transformed_input, axis);
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// output
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transformed_output.Resize(output->dims());
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auto out_dims_vec = vectorize(output->dims());
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out_dims_vec[1] = output->dims()[4];
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out_dims_vec[2] = output->dims()[1];
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out_dims_vec[3] = output->dims()[2];
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out_dims_vec[4] = output->dims()[3];
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transformed_output.Resize(out_dims_vec);
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dev_ctx.Alloc(&transformed_output, output->type());
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funcs::Transpose<Context, T, 5> trans5_v2;
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trans5_v2(dev_ctx, *output, &transformed_output, axis);
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// output grad
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transformed_output_grad.Resize(out_dims_vec);
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dev_ctx.Alloc(&transformed_output_grad, output_grad->type());
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funcs::Transpose<Context, T, 5> trans5_v3;
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trans5_v3(dev_ctx, *output_grad, &transformed_output_grad, axis);
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// input grad
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transformed_input_grad.Resize(in_dims_vec);
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#ifdef PADDLE_WITH_HIP
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// MIOPEN not support NHWC data layout
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} else if (data_format == str_NHWC) {
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layout = DataLayout::NCHW;
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std::vector<int> axis{0, 3, 1, 2};
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// input
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transformed_input.Resize(input->dims());
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auto in_dims_vec = vectorize(input->dims());
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in_dims_vec[1] = input->dims()[3];
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in_dims_vec[2] = input->dims()[1];
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in_dims_vec[3] = input->dims()[2];
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transformed_input.Resize(in_dims_vec);
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dev_ctx.Alloc(&transformed_input, input->type());
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funcs::Transpose<Context, T, 4> trans4;
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trans4(dev_ctx, *input, &transformed_input, axis);
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// output
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transformed_output.Resize(output->dims());
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auto out_dims_vec = vectorize(output->dims());
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out_dims_vec[1] = output->dims()[3];
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out_dims_vec[2] = output->dims()[1];
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out_dims_vec[3] = output->dims()[2];
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transformed_output.Resize(out_dims_vec);
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dev_ctx.Alloc(&transformed_output, output->type());
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funcs::Transpose<Context, T, 4> trans4_v2;
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trans4_v2(dev_ctx, *output, &transformed_output, axis);
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// output grad
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transformed_output_grad.Resize(out_dims_vec);
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dev_ctx.Alloc(&transformed_output_grad, output_grad->type());
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funcs::Transpose<Context, T, 4> trans4_v3;
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trans4_v3(dev_ctx, *output_grad, &transformed_output_grad, axis);
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// input grad
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transformed_input_grad.Resize(in_dims_vec);
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#endif
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} else {
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layout = GetLayoutFromStr(data_format);
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transformed_input = *input;
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transformed_output = *output;
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transformed_output_grad = *output_grad;
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transformed_input_grad = *input_grad;
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}
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const T* input_data = transformed_input.data<T>();
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const T* output_data = transformed_output.data<T>();
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const T* output_grad_data = transformed_output_grad.data<T>();
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// ------------------- cudnn descriptors ---------------------
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ScopedTensorDescriptor input_desc;
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ScopedTensorDescriptor output_desc;
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ScopedPoolingDescriptor pool_desc;
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#ifdef PADDLE_WITH_HIP
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miopenTensorDescriptor_t cudnn_input_desc = input_desc.descriptor<T>(
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layout, vectorize<int>(transformed_input.dims()));
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miopenTensorDescriptor_t cudnn_output_desc = output_desc.descriptor<T>(
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layout, vectorize<int>(transformed_output.dims()));
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#else
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cudnnTensorDescriptor_t cudnn_input_desc = input_desc.descriptor<T>(
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layout, vectorize<int>(transformed_input.dims()));
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cudnnTensorDescriptor_t cudnn_output_desc = output_desc.descriptor<T>(
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layout, vectorize<int>(transformed_output.dims()));
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#endif
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PoolingMode pooling_mode;
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if (pooling_type == "max") {
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if (FLAGS_cudnn_deterministic) {
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pooling_mode = PoolingMode::kMaximumDeterministic;
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} else {
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pooling_mode = PoolingMode::kMaximum;
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}
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} else {
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pooling_mode = exclusive ? PoolingMode::kAverageExclusive
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: PoolingMode::kAverageInclusive;
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}
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#ifdef PADDLE_WITH_HIP
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miopenPoolingDescriptor_t cudnn_pool_desc =
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pool_desc.descriptor(pooling_mode, kernel_size_, paddings_, strides_);
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#else
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cudnnPoolingDescriptor_t cudnn_pool_desc =
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pool_desc.descriptor(pooling_mode, kernel_size_, paddings_, strides_);
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#endif
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// ------------------- cudnn pool algorithm ---------------------
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auto handle = dev_ctx.cudnn_handle();
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ScalingParamType<T> alpha = 1.0f, beta = 0.0f;
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if (input_grad) {
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T* input_grad_data = dev_ctx.template Alloc<T>(&transformed_input_grad);
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// Because beta is zero, it is unnecessary to reset input_grad.
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#ifdef PADDLE_WITH_HIP
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char* pool_workspace;
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size_t pool_worksize = 0;
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PADDLE_ENFORCE_GPU_SUCCESS(dynload::miopenPoolingGetWorkSpaceSizeV2(
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cudnn_pool_desc, cudnn_output_desc, &pool_worksize));
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PADDLE_ENFORCE_GPU_SUCCESS(hipMalloc(&pool_workspace, pool_worksize));
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PADDLE_ENFORCE_GPU_SUCCESS(dynload::miopenPoolingBackward(handle,
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cudnn_pool_desc,
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&alpha,
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cudnn_output_desc,
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output_data,
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cudnn_output_desc,
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output_grad_data,
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cudnn_input_desc,
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input_data,
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&beta,
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cudnn_input_desc,
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input_grad_data,
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pool_workspace));
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PADDLE_ENFORCE_GPU_SUCCESS(hipFree(pool_workspace));
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#else
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PADDLE_ENFORCE_GPU_SUCCESS(dynload::cudnnPoolingBackward(handle,
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cudnn_pool_desc,
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&alpha,
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cudnn_output_desc,
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output_data,
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cudnn_output_desc,
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output_grad_data,
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cudnn_input_desc,
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input_data,
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&beta,
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cudnn_input_desc,
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input_grad_data));
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#endif
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if (data_format == str_NDHWC) {
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std::vector<int> axis{0, 2, 3, 4, 1};
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funcs::Transpose<Context, T, 5> trans5_v4;
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trans5_v4(dev_ctx, transformed_input_grad, input_grad, axis);
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}
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#ifdef PADDLE_WITH_HIP
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// MIOPEN not support NHWC data layout
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if (data_format == str_NHWC) {
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std::vector<int> axis{0, 2, 3, 1};
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funcs::Transpose<Context, T, 4> trans4_v4;
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trans4_v4(dev_ctx, transformed_input_grad, input_grad, axis);
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}
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#endif
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}
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}
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template <typename T, typename Context>
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void Pool2dGradGPUDNNKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& out,
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const DenseTensor& dout,
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const IntArray& kernel_size,
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const std::vector<int64_t>& strides,
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const std::vector<int64_t>& paddings,
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bool ceil_mode,
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bool exclusive,
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const std::string& data_format,
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const std::string& pooling_type,
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bool global_pooling,
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bool adaptive,
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const std::string& padding_algorithm,
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DenseTensor* dx) {
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PoolGradRawGPUDNNKernel<T, Context>(dev_ctx,
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x,
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out,
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dout,
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kernel_size.GetData(),
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strides,
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paddings,
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exclusive,
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data_format,
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pooling_type,
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global_pooling,
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adaptive,
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padding_algorithm,
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dx);
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}
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template <typename T, typename Context>
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void Pool2dDoubleGradGPUDNNKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const IntArray& kernel_size,
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const std::vector<int64_t>& strides,
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const std::vector<int64_t>& paddings,
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bool ceil_mode,
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bool exclusive,
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const std::string& data_format,
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const std::string& pooling_type,
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bool global_pooling,
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bool adaptive,
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const std::string& padding_algorithm,
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DenseTensor* out) {
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if (pooling_type == "max") {
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PADDLE_THROW(
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errors::InvalidArgument("Pool op grad grad only supports avgpool."));
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} else {
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Pool2dGPUDNNKernel<T, Context>(dev_ctx,
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x,
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kernel_size,
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strides,
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paddings,
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ceil_mode,
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exclusive,
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data_format,
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pooling_type,
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global_pooling,
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adaptive,
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padding_algorithm,
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out);
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}
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}
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template <typename T, typename Context>
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void Pool3dGradGPUDNNKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& out,
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const DenseTensor& dout,
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const std::vector<int64_t>& kernel_size,
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const std::vector<int64_t>& strides,
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const std::vector<int64_t>& paddings,
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bool ceil_mode,
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bool exclusive,
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const std::string& data_format,
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const std::string& pooling_type,
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bool global_pooling,
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bool adaptive,
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const std::string& padding_algorithm,
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DenseTensor* dx) {
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PoolGradRawGPUDNNKernel<T, Context>(dev_ctx,
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x,
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out,
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dout,
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kernel_size,
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strides,
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paddings,
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exclusive,
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data_format,
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pooling_type,
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global_pooling,
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adaptive,
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padding_algorithm,
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dx);
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}
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} // namespace phi
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using phi::float16;
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#ifdef PADDLE_WITH_HIP
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// MIOPEN do not support double
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PD_REGISTER_KERNEL(pool2d_grad,
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GPUDNN,
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ALL_LAYOUT,
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phi::Pool2dGradGPUDNNKernel,
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float,
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float16) {}
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PD_REGISTER_KERNEL(pool2d_double_grad,
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GPUDNN,
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ALL_LAYOUT,
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phi::Pool2dDoubleGradGPUDNNKernel,
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float,
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float16) {}
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PD_REGISTER_KERNEL(pool3d_grad,
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GPUDNN,
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ALL_LAYOUT,
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phi::Pool3dGradGPUDNNKernel,
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float,
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float16) {}
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#else
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PD_REGISTER_KERNEL(pool2d_grad,
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GPUDNN,
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ALL_LAYOUT,
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phi::Pool2dGradGPUDNNKernel,
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float,
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double,
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float16) {}
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PD_REGISTER_KERNEL(pool2d_double_grad,
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GPUDNN,
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ALL_LAYOUT,
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phi::Pool2dDoubleGradGPUDNNKernel,
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float,
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double,
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float16) {}
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PD_REGISTER_KERNEL(pool3d_grad,
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GPUDNN,
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ALL_LAYOUT,
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phi::Pool3dGradGPUDNNKernel,
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float,
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double,
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float16) {}
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#endif
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