259 lines
9.1 KiB
Plaintext
259 lines
9.1 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/repeat_interleave_grad_kernel.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/backends/gpu/gpu_launch_config.h"
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#include "paddle/phi/backends/gpu/gpu_primitives.h"
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#include "paddle/phi/common/data_type.h"
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#include "paddle/phi/core/dense_tensor.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/cast_kernel.h"
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#include "paddle/phi/kernels/cpu/index_select_impl.h"
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#include "paddle/phi/kernels/funcs/cub.h"
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#include "paddle/phi/kernels/funcs/repeat_tensor2index_tensor.h"
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#include "paddle/phi/kernels/primitive/functor_primitives.h"
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#include "paddle/phi/kernels/primitive/kernel_primitives.h"
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#include "paddle/phi/kernels/reduce_sum_kernel.h"
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namespace phi {
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template <typename T, typename IndexT>
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__global__ void index_select_grad_cuda_kernel(const T* output_grad,
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T* input_grad,
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const IndexT* index,
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int64_t output_grad_numel,
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int64_t stride,
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int64_t size,
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int64_t delta) {
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int64_t idx =
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static_cast<int64_t>(blockIdx.x) * static_cast<int64_t>(blockDim.x) +
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static_cast<int64_t>(threadIdx.x);
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if (idx >= output_grad_numel) {
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return;
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}
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int64_t pre_idx = idx / (stride * size);
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int64_t dim_idx = idx % (stride * size) / stride;
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IndexT src_dim_idx = index[dim_idx];
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int64_t input_idx = idx + (delta * pre_idx + src_dim_idx - dim_idx) * stride;
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CudaAtomicAdd(&input_grad[input_idx], output_grad[idx]);
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}
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template <typename T, int VecSize>
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__global__ void index_select_grad_init(T* input_grad, int64_t numel) {
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using VecType = kps::details::VectorType<T, VecSize>;
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const int64_t tid = (blockIdx.x * blockDim.x + threadIdx.x) * VecSize;
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if (tid >= numel) return;
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T set_value[VecSize];
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#pragma unroll
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for (int i = 0; i < VecSize; i++) {
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set_value[i] = static_cast<T>(0);
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}
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const VecType* vec_value = reinterpret_cast<const VecType*>(&set_value[0]);
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const int64_t vectorizable_limit = numel - VecSize;
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#pragma unroll
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for (int64_t i = tid; i < numel; i += blockDim.x * gridDim.x * VecSize) {
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if constexpr (VecSize == 1) {
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VecType* vec_output = reinterpret_cast<VecType*>(&input_grad[i]);
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*vec_output = *vec_value;
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} else {
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// Hint compiler to prioritize the vectorized fast path for better
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// performance.
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if (__builtin_expect(i <= vectorizable_limit, 1)) {
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VecType* vec_output = reinterpret_cast<VecType*>(&input_grad[i]);
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*vec_output = *vec_value;
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} else {
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#pragma unroll
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for (int64_t j = i; j < numel; j++) {
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input_grad[j] = static_cast<T>(0);
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}
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}
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}
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}
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}
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template <typename T, typename Context>
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void RepeatInterleaveWithTensorIndexGradKernel(
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const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& repeats_tensor,
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const DenseTensor& out_grad,
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int dim,
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int64_t output_size,
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DenseTensor* x_grad) {
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auto input_dim = x_grad->dims();
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if (dim < 0) {
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dim += static_cast<int>(input_dim.size());
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}
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DenseTensor index;
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PADDLE_ENFORCE_EQ(repeats_tensor.dims()[0] == x_grad->dims()[dim],
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true,
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common::errors::InvalidArgument(
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"The length of Input(RepeatsTensor) must be the "
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"same as length of Input(X) in axis. "
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"But received: [%s], required: [%d].",
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repeats_tensor.dims()[0],
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x_grad->dims()[dim]));
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const auto& index_type = repeats_tensor.dtype();
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bool index_type_match =
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index_type == DataType::INT32 || index_type == DataType::INT64;
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PADDLE_ENFORCE_EQ(index_type_match,
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true,
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common::errors::InvalidArgument(
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"Input(Repeats) holds the wrong type, it holds %s, but "
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"desires to be %s or %s",
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DataTypeToString(index_type),
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DataTypeToString(DataType::INT32),
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DataTypeToString(DataType::INT64)));
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auto output_dim = out_grad.dims();
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auto stride_dim = common::stride(input_dim);
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int64_t stride = stride_dim[dim];
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int64_t size = output_dim[dim];
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int64_t delta = input_dim[dim] - size;
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int64_t numel = x_grad->numel();
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int64_t out_nums = out_grad.numel();
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auto* out_grad_data = out_grad.data<T>();
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dev_ctx.template Alloc<T>(x_grad);
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if (numel == 0) {
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return;
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}
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auto* in_grad_data = x_grad->data<T>();
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auto stream = dev_ctx.stream();
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int vec_size = 8;
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vec_size = std::min(GetVectorizedSize(in_grad_data), vec_size);
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auto config = backends::gpu::GetGpuLaunchConfig1D(dev_ctx, numel, vec_size);
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switch (vec_size) {
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#define CASE_VEC_SIZE(__Sz) \
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case __Sz: \
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index_select_grad_init<T, __Sz> \
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<<<config.block_per_grid, config.thread_per_block, 0, stream>>>( \
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in_grad_data, numel); \
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break
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CASE_VEC_SIZE(8);
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CASE_VEC_SIZE(4);
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CASE_VEC_SIZE(2);
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CASE_VEC_SIZE(1);
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#undef CASE_VEC_SIZE
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default:
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PADDLE_THROW(common::errors::Unimplemented(
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"Unsupported vectorized size: %d", vec_size));
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}
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if (index_type == DataType::INT64) {
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funcs::RepeatsTensor2IndexTensorFunctor<Context, int64_t>()(
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dev_ctx, repeats_tensor, &index);
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int64_t index_nums = index.numel();
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const int64_t* index_data = index.data<int64_t>();
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index_select_grad_cuda_kernel<T, int64_t>
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<<<(out_nums + PADDLE_CUDA_NUM_THREADS - 1) / PADDLE_CUDA_NUM_THREADS,
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PADDLE_CUDA_NUM_THREADS,
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0,
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stream>>>(out_grad_data,
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in_grad_data,
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index_data,
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out_nums,
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stride,
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size,
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delta);
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} else {
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funcs::RepeatsTensor2IndexTensorFunctor<Context, int>()(
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dev_ctx, repeats_tensor, &index);
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int64_t index_nums = index.numel();
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const int* index_data = index.data<int>();
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index_select_grad_cuda_kernel<T, int>
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<<<(out_nums + PADDLE_CUDA_NUM_THREADS - 1) / PADDLE_CUDA_NUM_THREADS,
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PADDLE_CUDA_NUM_THREADS,
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0,
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stream>>>(out_grad_data,
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in_grad_data,
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index_data,
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out_nums,
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stride,
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size,
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delta);
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}
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}
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template <typename T, typename Context>
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void RepeatInterleaveGradKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& out_grad,
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int repeats,
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int dim,
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int64_t output_size,
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DenseTensor* x_grad) {
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if (x_grad && x_grad->numel() == 0) {
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dev_ctx.template Alloc<T>(x_grad);
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return;
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}
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auto input_dim = x_grad->dims();
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auto output_grad_dim = out_grad.dims();
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const int ndim = input_dim.size();
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dim = (dim < 0) ? ndim + dim : dim;
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std::vector<int64_t> reshape_shape = vectorize(input_dim);
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reshape_shape.insert(reshape_shape.begin() + dim + 1, repeats);
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DenseTensor out_grad_copy;
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out_grad_copy.set_meta(out_grad.meta());
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out_grad_copy.ShareBufferWith(out_grad, true);
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out_grad_copy.Resize(reshape_shape);
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SumKernel<T, Context>(dev_ctx,
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out_grad_copy,
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IntArray({dim + 1}),
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x_grad->dtype(),
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false,
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x_grad);
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}
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} // namespace phi
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PD_REGISTER_KERNEL(repeat_interleave_with_tensor_index_grad,
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GPU,
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ALL_LAYOUT,
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phi::RepeatInterleaveWithTensorIndexGradKernel,
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float,
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double,
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int,
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int64_t,
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phi::float16,
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phi::bfloat16) {}
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PD_REGISTER_KERNEL(repeat_interleave_grad,
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GPU,
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ALL_LAYOUT,
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phi::RepeatInterleaveGradKernel,
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float,
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double,
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int,
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int64_t,
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phi::float16,
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phi::bfloat16) {}
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