210 lines
7.5 KiB
Plaintext
210 lines
7.5 KiB
Plaintext
// Copyright (c) 2025 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/median_grad_kernel.h"
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#include <math.h>
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/backends/gpu/gpu_launch_config.h"
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#include "paddle/phi/backends/gpu/gpu_primitives.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/core/tensor_meta.h"
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#include "paddle/phi/kernels/funcs/math_function.h"
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#include "paddle/phi/kernels/funcs/nanmedian_utils.h"
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#include "paddle/phi/kernels/gpu/reduce_amin_amax_common.h"
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namespace phi {
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inline int GET_BLOCKS(const int N) {
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return (N + PADDLE_CUDA_NUM_THREADS - 1) / PADDLE_CUDA_NUM_THREADS;
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}
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template <typename T>
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__global__ void KernelMedianMeanGrad(const int64_t* medians_ptr,
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const T* out_grad_ptr,
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T* dx_data,
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int64_t stride,
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int64_t pre_dim) {
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CUDA_KERNEL_LOOP(index, pre_dim) {
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int64_t offset = index * stride;
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if (medians_ptr[2 * index] >= 0) {
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if (medians_ptr[2 * index] == medians_ptr[2 * index + 1]) {
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dx_data[offset + medians_ptr[2 * index]] = out_grad_ptr[index];
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} else {
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dx_data[offset + medians_ptr[2 * index]] =
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out_grad_ptr[index] / static_cast<T>(2.0);
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dx_data[offset + medians_ptr[2 * index + 1]] =
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out_grad_ptr[index] / static_cast<T>(2.0);
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}
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}
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}
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}
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template <typename T>
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__global__ void KernelMedianMinGrad(const int64_t* medians_ptr,
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const T* out_grad_ptr,
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T* dx_data,
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int64_t stride,
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int64_t pre_dim) {
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CUDA_KERNEL_LOOP(index, pre_dim) {
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int64_t offset = index * stride;
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if (medians_ptr[index] >= 0) {
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dx_data[offset + medians_ptr[index]] = out_grad_ptr[index];
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}
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}
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}
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template <typename T>
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__global__ void KernelMedianGradEvenly(const T* medians_ptr,
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const int64_t* median_index_ptr,
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const T* out_grad_ptr,
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T* x,
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T* dx_data,
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int64_t stride,
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int64_t pre_dim) {
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CUDA_KERNEL_LOOP(index, pre_dim) {
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int64_t offset = index * stride;
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if (median_index_ptr[2 * index] >= 0 &&
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!isnan(static_cast<float>(medians_ptr[index]))) {
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x[offset + median_index_ptr[2 * index]] = medians_ptr[index];
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x[offset + median_index_ptr[2 * index + 1]] = medians_ptr[index];
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}
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}
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}
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template <typename T, typename Context>
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void CalcMedianGradKernel_GPU(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& median_data,
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const DenseTensor& median_index,
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const DenseTensor& out_grad,
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const std::string& mode,
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const bool evenly,
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DenseTensor* x_grad) {
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T* dx_data = dev_ctx.template Alloc<T>(x_grad);
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if (!dx_data) return;
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funcs::SetConstant<Context, T> set_zero;
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set_zero(dev_ctx, x_grad, static_cast<T>(0));
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// VLOG(0) << "x_grad->dims(): " << x_grad->dims();
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auto stream = dev_ctx.stream();
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const T* x_data = x.data<T>();
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const int64_t* m_index = median_index.data<int64_t>();
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const T* m_data = median_data.data<T>();
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const T* out_grad_ptr = out_grad.data<T>();
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int64_t numel = x.numel();
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auto x_dim = x.dims();
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int64_t x_rank = x_dim.size();
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int64_t stride = x_dim[x_rank - 1];
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int64_t pre_dim = numel / stride;
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if (!evenly) {
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if (mode == "avg") {
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KernelMedianMeanGrad<T>
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<<<GET_BLOCKS(pre_dim), PADDLE_CUDA_NUM_THREADS, 0, stream>>>(
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m_index, out_grad_ptr, dx_data, stride, pre_dim);
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} else { // mode == "min"
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KernelMedianMinGrad<T>
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<<<GET_BLOCKS(pre_dim), PADDLE_CUDA_NUM_THREADS, 0, stream>>>(
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m_index, out_grad_ptr, dx_data, stride, pre_dim);
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}
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} else {
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std::vector<int64_t> dims;
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dims.push_back(-1);
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DenseTensor tmp_x(x);
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dev_ctx.template Alloc<T>(&tmp_x);
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T* tmp_x_data = tmp_x.data<T>();
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if (mode == "avg") {
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KernelMedianGradEvenly<T>
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<<<GET_BLOCKS(pre_dim), PADDLE_CUDA_NUM_THREADS, 0, stream>>>(
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m_data,
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m_index,
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out_grad_ptr,
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tmp_x_data,
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dx_data,
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stride,
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pre_dim);
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}
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auto grad_dim = x_grad->dims();
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x_grad->Resize(x.dims());
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ReduceCudaAMaxAMinGrad<T, Context>(
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dev_ctx, tmp_x, median_data, out_grad, dims, true, false, x_grad, true);
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x_grad->Resize(grad_dim);
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}
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}
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template <typename T, typename Context>
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void MedianGradKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& median_data,
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const DenseTensor& median_index,
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const DenseTensor& out_grad,
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const IntArray& axes,
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bool keepdim UNUSED,
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const std::string& mode,
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DenseTensor* x_grad) {
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if (x_grad && x_grad->numel() == 0) {
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dev_ctx.template Alloc<T>(x_grad);
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return;
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}
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bool evenly = (axes.size() != 1 || mode == "avg");
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DenseTensor tmp_x;
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auto rank = x.dims().size();
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if ((axes.size() == 0) || rank <= 1) {
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tmp_x = x;
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tmp_x.Resize({x.numel()});
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CalcMedianGradKernel_GPU<T, Context>(dev_ctx,
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tmp_x,
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median_data,
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median_index,
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out_grad,
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mode,
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evenly,
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x_grad);
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} else {
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funcs::PreprocessMedianKernel<T, Context>(dev_ctx, x, axes, &tmp_x);
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DenseTensor tmp_x_grad;
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tmp_x_grad.Resize(x_grad->dims());
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CalcMedianGradKernel_GPU<T, Context>(dev_ctx,
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tmp_x,
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median_data,
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median_index,
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out_grad,
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mode,
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evenly,
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&tmp_x_grad);
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dev_ctx.template Alloc<T>(x_grad);
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funcs::PostprocessMedianGradKernel<T, Context>(
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dev_ctx, &tmp_x_grad, axes, x_grad);
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(median_grad,
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GPU,
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ALL_LAYOUT,
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phi::MedianGradKernel,
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float,
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double,
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int,
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int64_t,
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phi::float16,
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phi::bfloat16) {}
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