wehub-resource-sync
88 lines
2.8 KiB
Plaintext
88 lines
2.8 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/kthvalue_grad_kernel.h"
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/math_function.h"
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#include "paddle/phi/kernels/funcs/top_k_function_cuda.h"
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namespace phi {
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static int getBlockSize(int64_t col) {
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if (col > 512)
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return 1024;
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else if (col > 256 && col <= 512)
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return 512;
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else if (col > 128 && col <= 256)
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return 256;
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else if (col > 64 && col <= 128)
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return 128;
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else
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return 64;
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}
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template <typename T, typename Context>
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void KthvalueGradKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& indices,
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const DenseTensor& d_out,
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int64_t k,
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int axis,
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bool keepdim,
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DenseTensor* d_x) {
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const auto& in_dims = x.dims();
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auto out_dims = indices.dims();
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T* x_grad_data = dev_ctx.template Alloc<T>(d_x);
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if (d_x && d_x->numel() == 0) {
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return;
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}
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// For 0D Tensor
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if (in_dims.size() == 0) {
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funcs::set_constant(dev_ctx, d_x, static_cast<T>(1.0));
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return;
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}
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if (axis < 0) axis += in_dims.size();
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const T* out_grad_data = d_out.data<T>();
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const int64_t* indices_data = indices.data<int64_t>();
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int64_t pre, n, post;
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funcs::GetDims(in_dims, axis, &pre, &n, &post);
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int block_size = getBlockSize(post * k);
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int max_threads = dev_ctx.GetMaxPhysicalThreadCount();
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const int64_t max_blocks = std::max(((max_threads - 1) / block_size + 1), 1);
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int64_t desired_grid_size = std::min(max_blocks, pre);
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int64_t grid_size =
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std::min(desired_grid_size,
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static_cast<int64_t>(dev_ctx.GetCUDAMaxGridDimSize()[0]));
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funcs::AssignGradWithAxis<T>
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<<<grid_size, block_size, 64 * 4, dev_ctx.stream()>>>(
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out_grad_data, indices_data, x_grad_data, pre, post, n, 1);
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}
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} // namespace phi
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PD_REGISTER_KERNEL(kthvalue_grad,
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GPU,
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ALL_LAYOUT,
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phi::KthvalueGradKernel,
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float,
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double,
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int,
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int64_t,
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phi::bfloat16,
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phi::float16) {}
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