wehub-resource-sync
216 lines
8.5 KiB
Plaintext
216 lines
8.5 KiB
Plaintext
// Copyright (c) 2025 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/index_elementwise_get_kernel.h"
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#include <cstdio>
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#include "paddle/phi/backends/gpu/gpu_context.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/index_elementwise.cu.h"
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#include "paddle/phi/kernels/funcs/stride_utils.h"
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namespace phi {
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template <typename T, typename OffsetT = uint32_t>
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void GPUIndexElementwiseGetKernel(const GPUContext& dev_ctx,
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const DenseTensor& input,
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const std::vector<const DenseTensor*>& index,
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const std::vector<int64_t>& input_dims,
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const std::vector<int64_t>& input_strides,
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const std::vector<int64_t>& index_dims,
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const std::vector<int64_t>& index_stride,
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const int64_t slice_offset,
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DenseTensor* output) {
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int64_t numel = 0;
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int64_t num_indices = 0;
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std::vector<int64_t> shape_tmp;
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std::vector<int64_t> stride_tmp;
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funcs::cal_shape_stride(index_dims, &num_indices, &shape_tmp, &stride_tmp);
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auto index_ptrs = funcs::GetIndexDataPtrs<int64_t>(index);
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auto sizes = std::array<int64_t, DDim::kMaxRank>{};
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auto strides = std::array<int64_t, DDim::kMaxRank>{};
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for (int64_t i = 0; i < num_indices; i++) {
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sizes[i] = index_dims[i];
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strides[i] = index_stride[i];
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}
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std::array<int64_t*, 3> strides_array;
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std::vector<int64_t> desired_shape;
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std::array<std::vector<int64_t>, 3> strides_vec;
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funcs::IndexGetStride<3>(input_dims,
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input_strides,
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phi::SizeOf(input.dtype()),
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std::vector<int64_t>(),
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std::vector<int64_t>(),
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phi::SizeOf(input.dtype()),
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shape_tmp,
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stride_tmp,
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phi::SizeOf(index[0]->dtype()),
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&desired_shape,
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&strides_array,
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&numel,
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strides_vec);
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auto offset_calc = funcs::make_offset_calculator_put<3, false, OffsetT>(
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desired_shape, strides_array);
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const int64_t N = output->numel();
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constexpr int nt = 128;
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constexpr int vt = 4;
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const dim3 block(nt);
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const int64_t grid_x = (N + block.x * vt - 1) / (block.x * vt);
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const int64_t max_grid_dim = dev_ctx.GetCUDAMaxGridDimSize()[0];
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const dim3 grid(std::min(max_grid_dim, grid_x));
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auto stream = dev_ctx.stream();
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using dtype = funcs::OpaqueType<sizeof(T)>;
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const char* in_ptr =
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reinterpret_cast<const char*>(input.data<T>()) + slice_offset;
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char* out_ptr = reinterpret_cast<char*>(output->data<T>());
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if (grid_x <= max_grid_dim) {
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funcs::index_elementwise_with_tensor_kernel<nt, vt>
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<<<grid, block, 0, stream>>>(N, [=] __device__(int64_t idx) {
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if (idx < N) {
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const auto offsets = offset_calc.get(idx);
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char* const out_data = out_ptr + offsets[0];
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const char* const in_data = in_ptr + offsets[1];
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int64_t offset = 0;
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#pragma unroll
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for (int64_t i = 0; i < num_indices; i++) {
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int64_t index =
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*reinterpret_cast<int64_t*>(index_ptrs[i] + offsets[2]);
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if (index < 0) {
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index += sizes[i];
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}
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offset += index * strides[i];
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}
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*reinterpret_cast<dtype*>(out_data) =
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*reinterpret_cast<const dtype*>(in_data + offset);
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}
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});
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} else {
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const int64_t chunks = (grid_x + max_grid_dim - 1) / max_grid_dim;
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for (int64_t chunk = 0; chunk < chunks; ++chunk) {
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const int64_t start_idx = chunk * max_grid_dim * nt * vt;
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const int64_t end_idx = std::min((chunk + 1) * max_grid_dim * nt * vt, N);
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const int64_t chunk_size = end_idx - start_idx;
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const int64_t chunk_grid_x = (chunk_size + nt * vt - 1) / (nt * vt);
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const dim3 chunk_grid(std::min(chunk_grid_x, max_grid_dim));
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funcs::index_elementwise_with_tensor_kernel<nt, vt>
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<<<chunk_grid, block, 0, stream>>>(
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chunk_size, [=] __device__(int64_t local_idx) {
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const int64_t idx = start_idx + local_idx;
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if (idx < N) {
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const auto offsets = offset_calc.get(idx);
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char* const out_data = out_ptr + offsets[0];
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const char* const in_data = in_ptr + offsets[1];
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int64_t offset = 0;
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#pragma unroll
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for (int64_t i = 0; i < num_indices; i++) {
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int64_t index =
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*reinterpret_cast<int64_t*>(index_ptrs[i] + offsets[2]);
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if (index < 0) {
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index += sizes[i];
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}
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offset += index * strides[i];
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}
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*reinterpret_cast<dtype*>(out_data) =
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*reinterpret_cast<const dtype*>(in_data + offset);
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}
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});
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}
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}
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}
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template <typename T, typename Context>
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void IndexElementwiseGetKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const std::vector<const DenseTensor*>& index,
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const std::vector<int64_t>& input_dims,
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const std::vector<int64_t>& input_strides,
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const std::vector<int64_t>& index_dims,
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const std::vector<int64_t>& index_stride,
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const int64_t slice_offset,
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const bool accumulate,
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const bool is_combined,
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DenseTensor* out) {
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const auto& index_type = index[0]->dtype();
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PADDLE_ENFORCE_EQ(index_type == DataType::INT64,
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true,
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common::errors::InvalidArgument(
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"Index holds the wrong type, it holds [%s], but "
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"desires to be [%s].",
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index_type,
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DataType::INT64));
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auto out_dims = out->dims();
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if (out_dims.size() > 0) {
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std::vector<int64_t> output_dims(input_dims);
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out->Resize(output_dims);
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}
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dev_ctx.template Alloc<T>(out);
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if (out->numel() == 0) return;
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if (funcs::IsInUint32Range(x.numel() * sizeof(T), out->numel() * sizeof(T))) {
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GPUIndexElementwiseGetKernel<T>(dev_ctx,
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x,
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index,
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input_dims,
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input_strides,
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index_dims,
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index_stride,
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slice_offset,
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out);
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} else {
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GPUIndexElementwiseGetKernel<T, uint64_t>(dev_ctx,
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x,
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index,
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input_dims,
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input_strides,
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index_dims,
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index_stride,
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slice_offset,
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out);
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(index_elementwise_get,
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GPU,
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ALL_LAYOUT,
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phi::IndexElementwiseGetKernel,
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bool,
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float,
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double,
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int,
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int8_t,
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int64_t,
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int16_t,
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uint8_t,
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phi::float16,
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phi::bfloat16,
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phi::complex64,
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phi::complex128) {}
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