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// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "paddle/phi/kernels/erfinv_kernel.h"
#include <limits>
#include "paddle/phi/backends/gpu/gpu_context.h"
#include "paddle/phi/core/kernel_registry.h"
#include "paddle/phi/kernels/funcs/elementwise_base.h"
namespace phi {
template <typename T>
struct ErfinvFunctor {
HOSTDEVICE inline T operator()(const T x) const {
// erfinv is only defined on [-1, 1]; align with PyTorch/scipy by
// returning NaN for |x| > 1 (CUDA erfinv returns +/-inf otherwise).
if (x > static_cast<T>(1) || x < static_cast<T>(-1)) {
return std::numeric_limits<T>::quiet_NaN();
}
return erfinv(x);
}
};
template <>
struct ErfinvFunctor<float16> {
HOSTDEVICE inline float16 operator()(const float16 x) const {
auto x_ = static_cast<float>(x);
if (x_ > 1.0f || x_ < -1.0f) {
return std::numeric_limits<float16>::quiet_NaN();
}
return static_cast<float16>(erfinv(x_));
}
};
template <>
struct ErfinvFunctor<bfloat16> {
HOSTDEVICE inline bfloat16 operator()(const bfloat16 x) const {
auto x_ = static_cast<float>(x);
if (x_ > 1.0f || x_ < -1.0f) {
return std::numeric_limits<bfloat16>::quiet_NaN();
}
return static_cast<bfloat16>(erfinv(x_));
}
};
template <typename T, typename Context>
void ErfinvKernel(const Context& dev_ctx,
const DenseTensor& x,
DenseTensor* out) {
dev_ctx.template Alloc<T>(out);
if (out && out->numel() == 0) {
return;
}
std::vector<const DenseTensor*> ins = {&x};
std::vector<DenseTensor*> outs = {out};
funcs::ElementwiseKernel<T>(dev_ctx, ins, &outs, ErfinvFunctor<T>());
}
} // namespace phi
PD_REGISTER_KERNEL(erfinv,
GPU,
ALL_LAYOUT,
phi::ErfinvKernel,
float,
double,
phi::float16,
phi::bfloat16) {}