117 lines
3.7 KiB
Plaintext
117 lines
3.7 KiB
Plaintext
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/broadcast_tensors_grad_kernel.h"
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#include <vector>
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#include "paddle/phi/common/amp_type_traits.h"
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#include "paddle/phi/core/dense_tensor.h"
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#include "paddle/phi/core/enforce.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/reduce_function.h"
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#include "paddle/phi/kernels/primitive/functor_primitives.h"
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#include "paddle/phi/kernels/reduce_sum_kernel.h"
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namespace phi {
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template <typename T, typename Context>
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void BroadcastTensorsGradKernel(const Context& dev_ctx,
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const std::vector<const DenseTensor*>& inputs,
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const std::vector<const DenseTensor*>& dout,
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std::vector<DenseTensor*> dx) {
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(void)inputs;
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// Find reduce dimensions
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const auto& in_tensors = dout;
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auto& out_tensors = dx;
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size_t num_ins = in_tensors.size();
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PADDLE_ENFORCE_GT(
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num_ins,
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1,
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errors::InvalidArgument(
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"Expected at least 2 input tensors, but only received %d.",
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in_tensors.size()));
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PADDLE_ENFORCE_EQ(
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num_ins,
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out_tensors.size(),
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errors::InvalidArgument(
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"BroadcastTensorsOp expects equal number of inputs and outputs,"
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"but received: %d inputs v.s %d outputs",
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num_ins,
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out_tensors.size()));
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// For each In-Out tensor pair,
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// Prepare and apply broadcast dims array
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for (size_t i = 0; i < num_ins; i++) {
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auto* input_tensor = in_tensors[i];
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auto* output_tensor = out_tensors[i];
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const DDim& input_dims = input_tensor->dims();
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const DDim& output_dims = output_tensor->dims();
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int in_rank = input_dims.size();
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int out_rank = output_dims.size();
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// Collect reduce_dims
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// Example:
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// dX = [1,1,1,1]
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// dOut = [1,1,1,4]
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//
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// reduce_dims = [3] // reduce along the broadcasted axis
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std::vector<int> reduce_dims_vec;
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for (int j = 0; j < in_rank; j++) {
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int out_axis = out_rank - j - 1;
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int in_axis = in_rank - j - 1;
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if (out_axis < 0 || output_dims[out_axis] != input_dims[in_axis]) {
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reduce_dims_vec.push_back(in_axis);
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}
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}
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bool just_copy = (reduce_dims_vec.size() == 0);
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dev_ctx.template Alloc<T>(output_tensor);
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if (just_copy) {
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// Turns out to be a No-Op, simply copy tensors
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Copy(dev_ctx, *input_tensor, dev_ctx.GetPlace(), false, output_tensor);
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} else {
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// reduce_sum implementation on CUDA
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SumKernel<T, Context>(dev_ctx,
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*input_tensor,
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reduce_dims_vec,
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output_tensor->dtype(),
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false,
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output_tensor);
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}
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(broadcast_tensors_grad,
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GPU,
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ALL_LAYOUT,
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phi::BroadcastTensorsGradKernel,
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bool,
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int,
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int64_t,
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float,
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double,
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phi::float16,
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phi::bfloat16,
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phi::complex64,
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phi::complex128) {}
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