wehub-resource-sync
151 lines
4.8 KiB
Plaintext
151 lines
4.8 KiB
Plaintext
// Copyright (c) 2024 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <string>
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#include "paddle/phi/backends/gpu/gpu_info.h"
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#include "paddle/phi/backends/gpu/gpu_primitives.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/kernels/funcs/blas/blas.h"
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#include "paddle/phi/kernels/funcs/eigen/common.h"
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namespace phi {
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const int CUDA_NUM_THREADS = 1024;
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static inline int GET_BLOCKS(const int N) {
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return (N + CUDA_NUM_THREADS - 1) / CUDA_NUM_THREADS;
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}
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template <typename T>
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__global__ void add_bias_grad_kernel(const T* dout_data,
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int slot_pairs_num,
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int ins_num,
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int out_dim,
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T* db_data) {
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CUDA_KERNEL_LOOP(idx, slot_pairs_num * out_dim) {
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int row = idx / out_dim;
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int col = idx % out_dim;
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T temp = static_cast<T>(0);
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for (int i = 0; i < ins_num; ++i) {
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int select_index = ((row + 1) * i + 1) * col;
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temp += dout_data[select_index];
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}
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db_data[idx] += temp;
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}
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}
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template <typename T>
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void add_bias_grad(gpuStream_t stream,
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const T* dout_data,
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int slot_pairs_num,
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int ins_num,
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int out_dim,
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T* db_data) {
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add_bias_grad_kernel<<<GET_BLOCKS(slot_pairs_num * out_dim),
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CUDA_NUM_THREADS,
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0,
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stream>>>(
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dout_data, slot_pairs_num, ins_num, out_dim, db_data);
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}
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template <typename T, typename Context>
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void BatchFCGradOpCUDAKernel(const Context& dev_ctx,
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const DenseTensor& input_in,
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const DenseTensor& w_in,
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const DenseTensor& bias_in UNUSED,
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const DenseTensor& out_grad,
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DenseTensor* input_grad,
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DenseTensor* w_grad,
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DenseTensor* bias_grad) {
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auto* input = &input_in;
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auto* w = &w_in;
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auto* dout = &out_grad;
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auto* dx = input_grad;
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auto* dw = w_grad;
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auto* db = bias_grad;
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auto input_dims = input->dims();
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auto w_dims = w->dims();
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auto slot_pairs_num = input_dims[0];
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auto ins_num = input_dims[1];
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auto in_dim = input_dims[2];
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auto out_dim = w_dims[2];
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auto& place = *dev_ctx.eigen_device();
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// initialize
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dev_ctx.template Alloc<T>(dx);
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auto dx_eigen = EigenVector<T>::Flatten(*dx);
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dx_eigen.device(place) = dx_eigen.constant(static_cast<T>(0));
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dev_ctx.template Alloc<T>(dw);
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auto dw_eigen = EigenVector<T>::Flatten(*dw);
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dw_eigen.device(place) = dw_eigen.constant(static_cast<T>(0));
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// get data ptr
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const T* x_data = input->data<T>();
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const T* w_data = w->data<T>();
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const T* dout_data = dout->data<T>();
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T* dx_data = dx->data<T>();
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T* dw_data = dw->data<T>();
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dev_ctx.template Alloc<T>(db);
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auto db_eigen = EigenVector<T>::Flatten(*db);
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db_eigen.device(place) = db_eigen.constant(static_cast<T>(0));
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T* db_data = db->data<T>();
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add_bias_grad<T>(
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dev_ctx.stream(), dout_data, slot_pairs_num, ins_num, out_dim, db_data);
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auto blas = funcs::GetBlas<GPUContext, T>(dev_ctx);
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T alpha = 1;
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T beta = 0;
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// dx = dout_data * y^T
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blas.BatchedGEMM(CblasNoTrans,
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CblasTrans,
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ins_num,
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in_dim,
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out_dim,
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alpha,
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dout_data,
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w_data,
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beta,
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dx_data,
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slot_pairs_num,
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ins_num * out_dim,
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out_dim * in_dim);
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// dy = x^T * dout_data
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blas.BatchedGEMM(CblasTrans,
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CblasNoTrans,
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in_dim,
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out_dim,
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ins_num,
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alpha,
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x_data,
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dout_data,
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beta,
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dw_data,
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slot_pairs_num,
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in_dim * ins_num,
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ins_num * out_dim);
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}
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} // namespace phi
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PD_REGISTER_KERNEL(batch_fc_grad,
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GPU,
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ALL_LAYOUT,
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phi::BatchFCGradOpCUDAKernel,
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float,
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double) {}
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