90 lines
3.1 KiB
Plaintext
90 lines
3.1 KiB
Plaintext
// Copyright (c) 2023 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/assign_pos_kernel.h"
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#include "paddle/phi/backends/gpu/gpu_primitives.h"
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#include "paddle/phi/core/dense_tensor.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/core/tensor_utils.h"
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namespace phi {
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static constexpr int kNumCUDAThreads = 512;
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static constexpr int64_t kNumMaximumNumBlocks = 4096;
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static inline int NumBlocks(const int64_t N) {
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return std::min((N + kNumCUDAThreads - 1) / kNumCUDAThreads,
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kNumMaximumNumBlocks);
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}
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template <typename T>
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__global__ void AssignPos(T* cum_count,
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const T* numbers,
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T* out,
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int64_t limit) {
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CUDA_KERNEL_LOOP(i, limit) {
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int number_idx = numbers[i];
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if (number_idx > -1) {
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int p = CudaAtomicAdd(cum_count + number_idx, -1);
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out[p - 1] = i;
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}
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}
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}
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template <typename T, typename Context>
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void AssignPosKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& cum_count,
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const DenseTensor& eff_num_len,
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DenseTensor* out) {
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// assign pos decides which tokens should be fetched belong to specially
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// counter orderingly.
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auto cum_count_ptr = &cum_count; // (counter number) int32 | int64
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auto numbers = &x; // (batch_size * seq_len, topk) int32
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auto eff_num_len_ptr = &eff_num_len; // (sum(cum_count))
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auto out_ptr = &out; // (cum_count) value ranges
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// from 0 to batch_size *
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// seq_len * topk
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auto numel = numbers->numel();
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T* cum_data = const_cast<T*>(cum_count_ptr->data<T>());
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auto cum_size = cum_count_ptr->numel();
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DenseTensor cpu_eff_num_len;
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int64_t cpu_eff_num_len_data = 0;
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bool is_cpu_place = eff_num_len_ptr->place() == CPUPlace();
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if (is_cpu_place) {
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cpu_eff_num_len_data = eff_num_len_ptr->data<T>()[0];
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} else {
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Copy(dev_ctx, eff_num_len, CPUPlace(), false, &cpu_eff_num_len);
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cpu_eff_num_len_data = cpu_eff_num_len.data<T>()[0];
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}
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DDim out_dims = make_ddim({cpu_eff_num_len_data});
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out->Resize(out_dims);
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auto out_data = dev_ctx.template Alloc<T>(out);
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const T* num_data = numbers->data<T>();
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int64_t blocks = NumBlocks(numel);
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int threads = kNumCUDAThreads;
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AssignPos<T><<<blocks, threads, 0, dev_ctx.stream()>>>(
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cum_data, num_data, out_data, numel);
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}
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} // namespace phi
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PD_REGISTER_KERNEL(assign_pos, GPU, ALL_LAYOUT, phi::AssignPosKernel, int64_t) {
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}
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