chore: import upstream snapshot with attribution
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wehub-resource-sync
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// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "paddle/phi/kernels/index_add_kernel.h"
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#include "glog/logging.h"
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#include "paddle/common/enforce.h"
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#include "paddle/common/flags.h"
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#include "paddle/phi/backends/gpu/gpu_info.h"
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#include "paddle/phi/backends/gpu/gpu_launch_config.h"
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#include "paddle/phi/backends/gpu/gpu_primitives.h"
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#include "paddle/phi/core/kernel_registry.h"
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#include "paddle/phi/core/utils/data_type.h"
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COMMON_DECLARE_bool(cudnn_deterministic);
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namespace phi {
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template <typename T, typename IndexT>
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__global__ void index_add_cuda_kernel(const T* input,
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const IndexT* index,
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const T* add_value,
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int64_t N,
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int64_t stride,
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int64_t size,
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int64_t delta,
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T* output,
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int64_t index_dim_size) {
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CUDA_KERNEL_LOOP_TYPE(idx, N, int64_t) {
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int64_t pre_idx = idx / (stride * size);
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int64_t dim_idx = idx % (stride * size) / stride;
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IndexT src_dim_idx =
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(index[dim_idx] < 0 ? index[dim_idx] + index_dim_size : index[dim_idx]);
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int64_t input_idx =
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idx + (delta * pre_idx + src_dim_idx - dim_idx) * stride;
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CudaAtomicAdd(&output[input_idx], add_value[idx]);
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}
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}
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template <typename T, typename IndexT>
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__global__ void index_add_deterministic_cuda_kernel(const T* input,
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const IndexT* index,
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const T* add_value,
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int64_t index_size,
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int64_t stride,
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int64_t pre_size,
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int64_t output_dim_size,
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T* output) {
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int64_t num_columns = pre_size * stride;
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CUDA_KERNEL_LOOP_TYPE(col_idx, num_columns, int64_t) {
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int64_t pre_idx = col_idx / stride;
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int64_t post_idx = col_idx % stride;
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for (int64_t k = 0; k < index_size; ++k) {
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IndexT src_dim_idx = index[k];
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IndexT actual_dim_idx =
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(src_dim_idx < 0 ? src_dim_idx + output_dim_size : src_dim_idx);
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int64_t val_idx = (pre_idx * index_size + k) * stride + post_idx;
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int64_t out_idx =
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(pre_idx * output_dim_size + actual_dim_idx) * stride + post_idx;
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output[out_idx] += add_value[val_idx];
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}
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}
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}
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template <typename T, typename Context>
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void IndexAddKernel(const Context& dev_ctx,
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const DenseTensor& x,
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const DenseTensor& index,
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const DenseTensor& add_value,
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int axis,
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DenseTensor* output) {
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if (x.numel() == 0) {
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Copy(dev_ctx, x, dev_ctx.GetPlace(), false, output);
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return;
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}
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if (index.numel() == 0) {
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Copy(dev_ctx, x, dev_ctx.GetPlace(), false, output);
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return;
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}
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if (add_value.numel() == 0) {
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Copy(dev_ctx, x, dev_ctx.GetPlace(), false, output);
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return;
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}
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auto input_dim = x.dims();
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auto output_dim = output->dims();
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auto add_value_dim = add_value.dims();
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const auto& index_type = index.dtype();
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int dim = axis;
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dim = dim >= 0 ? dim : dim + input_dim.size();
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auto stride_dim = common::stride(input_dim);
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int64_t stride = stride_dim[dim];
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int64_t size = add_value_dim[dim];
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int64_t delta = input_dim[dim] - size;
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auto* in_data = x.data<T>();
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T* out_data = dev_ctx.template Alloc<T>(output);
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auto* add_value_data = add_value.data<T>();
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int64_t numel = add_value.numel();
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auto stream = dev_ctx.stream();
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// copy input to output.
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// todo(@limin29): inplace do not need copy.
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Copy(dev_ctx, x, dev_ctx.GetPlace(), false, output);
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auto index_dim_size = input_dim[dim];
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if (FLAGS_cudnn_deterministic) {
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int64_t pre_size = numel / (size * stride);
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int64_t num_columns = pre_size * stride;
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unsigned int block_dim = PADDLE_CUDA_NUM_THREADS;
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const uint64_t grid_x = (num_columns + block_dim - 1) / block_dim;
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PADDLE_ENFORCE_LE_UINT32_MAX(grid_x, "grid.x");
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dim3 grid_dim = dim3(static_cast<uint32_t>(grid_x));
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backends::gpu::LimitGridDim(dev_ctx, &grid_dim);
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if (index_type == DataType::INT64) {
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const int64_t* index_data = index.data<int64_t>();
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index_add_deterministic_cuda_kernel<T, int64_t>
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<<<grid_dim, block_dim, 0, stream>>>(in_data,
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index_data,
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add_value_data,
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size,
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stride,
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pre_size,
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index_dim_size,
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out_data);
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} else {
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const int* index_data = index.data<int>();
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index_add_deterministic_cuda_kernel<T, int>
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<<<grid_dim, block_dim, 0, stream>>>(in_data,
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index_data,
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add_value_data,
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size,
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stride,
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pre_size,
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index_dim_size,
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out_data);
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}
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} else {
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unsigned int block_dim = PADDLE_CUDA_NUM_THREADS;
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const uint64_t grid_x = (numel + block_dim - 1) / block_dim;
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PADDLE_ENFORCE_LE_UINT32_MAX(grid_x, "grid.x");
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dim3 grid_dim = dim3(static_cast<uint32_t>(grid_x));
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backends::gpu::LimitGridDim(dev_ctx, &grid_dim);
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if (index_type == DataType::INT64) {
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const int64_t* index_data = index.data<int64_t>();
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index_add_cuda_kernel<T, int64_t>
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<<<grid_dim, block_dim, 0, stream>>>(in_data,
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index_data,
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add_value_data,
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numel,
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stride,
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size,
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delta,
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out_data,
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index_dim_size);
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} else {
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const int* index_data = index.data<int>();
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index_add_cuda_kernel<T, int>
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<<<grid_dim, block_dim, 0, stream>>>(in_data,
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index_data,
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add_value_data,
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numel,
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stride,
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size,
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delta,
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out_data,
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index_dim_size);
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}
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}
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}
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} // namespace phi
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PD_REGISTER_KERNEL(index_add,
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GPU,
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ALL_LAYOUT,
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phi::IndexAddKernel,
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float,
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double,
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phi::float16,
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phi::bfloat16,
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int,
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int64_t) {}
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