608 lines
17 KiB
C++
608 lines
17 KiB
C++
/*
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* SPDX-FileCopyrightText: Copyright (c) 1993-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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//! \file SampleIOFormats.cpp
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//! \brief This file contains the implementation of the I/O formats sample.
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//!
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//! It builds a TensorRT engine by from an MNIST network.
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//! It uses the engine to identify input images.
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//! The goal of this sample is to show how to specify allowed I/O formats.
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//! It can be run with the following command line:
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//! Command: ./sample_io_formats
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// Define TRT entrypoints used in common code
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#define DEFINE_TRT_ENTRYPOINTS 1
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#include "argsParser.h"
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#include "buffers.h"
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#include "common.h"
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#include "half.h"
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#include "logger.h"
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#include "parserOnnxConfig.h"
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#include "sampleOptions.h"
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#include "NvInfer.h"
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#include "NvOnnxParser.h"
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#include <algorithm>
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#include <cmath>
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#include <cuda_runtime_api.h>
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#include <fstream>
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#include <iostream>
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#include <sstream>
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#include <array>
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#include <cstdlib>
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#include <memory>
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#include <random>
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#include <string>
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#include <utility>
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#include <vector>
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using namespace nvinfer1;
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std::string const gSampleName = "TensorRT.sample_io_formats";
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inline int32_t divUp(int32_t a, int32_t b)
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{
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return (a + b - 1) / b;
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}
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template <typename T>
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std::shared_ptr<T> mallocCudaMem(size_t nbElems)
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{
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T* ptr = nullptr;
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CHECK(cudaMalloc((void**) &ptr, sizeof(T) * nbElems));
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return std::shared_ptr<T>(ptr, [](T* p) { CHECK(cudaFree(p)); });
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}
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class BufferDesc
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{
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public:
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BufferDesc() = default;
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BufferDesc(nvinfer1::Dims dims, int32_t dataWidth, TensorFormat format)
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{
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this->dataWidth = dataWidth;
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if (format == TensorFormat::kLINEAR)
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{
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this->dims[0] = dims.d[0];
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this->dims[1] = dims.d[1];
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this->dims[2] = dims.d[2];
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this->dims[3] = dims.d[3];
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this->dims[4] = 1;
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}
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else if (format == TensorFormat::kCHW32)
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{
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this->dims[0] = dims.d[0];
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this->dims[1] = divUp(dims.d[1], 32);
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this->dims[2] = dims.d[2];
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this->dims[3] = dims.d[3];
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this->dims[4] = 32;
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this->scalarPerVector = 32;
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}
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else if (format == TensorFormat::kHWC)
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{
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this->dims[0] = dims.d[0];
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this->dims[1] = dims.d[2];
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this->dims[2] = dims.d[3];
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this->dims[3] = dims.d[1];
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this->dims[4] = 1;
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this->channelPivot = true;
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}
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}
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// [(C+x-1)/x][H][W][x]
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// or
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// [H][W][(C+x-1)/x*x][1]
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int32_t dims[5] = {1, 1, 1, 1, 1};
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int32_t dataWidth = 1;
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int32_t scalarPerVector = 1;
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bool channelPivot = false;
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int32_t getElememtSize()
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{
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return dims[0] * dims[1] * dims[2] * dims[3] * dims[4];
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}
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int32_t getBufferSize()
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{
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return getElememtSize() * dataWidth;
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}
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};
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//! Specification for a network I/O tensor.
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class TypeSpec
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{
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public:
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DataType dtype; //!< datatype
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TensorFormat format; //!< format
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std::string formatName; //!< name of the format
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};
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class SampleBuffer
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{
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public:
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SampleBuffer()
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{
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dims.d[0] = 1;
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dims.d[1] = 1;
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dims.d[2] = 1;
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dims.d[3] = 1;
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}
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SampleBuffer(nvinfer1::Dims dims, int32_t dataWidth, TensorFormat format, bool isInput)
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: dims(dims)
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, dataWidth(dataWidth)
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, format(format)
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, isInput(isInput)
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{
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// Output buffer is unsqueezed to 4D in order to reuse the BufferDesc class
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if (isInput == false)
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{
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dims.d[2] = dims.d[0];
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dims.d[3] = dims.d[1];
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dims.d[0] = 1;
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dims.d[1] = 1;
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}
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desc = BufferDesc(dims, dataWidth, format);
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buffer = std::make_unique<uint8_t[]>(getBufferSize());
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}
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SampleBuffer& operator=(SampleBuffer&& sampleBuffer) noexcept
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{
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this->dims = sampleBuffer.dims;
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this->dataWidth = sampleBuffer.dataWidth;
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this->desc = sampleBuffer.desc;
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this->format = sampleBuffer.format;
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this->isInput = sampleBuffer.isInput;
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this->buffer = std::move(sampleBuffer.buffer);
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return *this;
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}
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void destroy()
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{
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buffer.reset();
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}
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nvinfer1::Dims dims;
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int32_t dataWidth{1};
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TensorFormat format{TensorFormat::kLINEAR};
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bool isInput{true};
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BufferDesc desc;
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std::unique_ptr<uint8_t[]> buffer;
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int32_t getBufferSize()
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{
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return desc.getBufferSize();
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}
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};
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//!
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//! \brief The SampleIOFormats class implements the I/O formats sample
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//!
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//! \details It creates the network using the Onnx parser.
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//!
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class SampleIOFormats
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{
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public:
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SampleIOFormats(samplesCommon::OnnxSampleParams const& params)
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: mParams(params)
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{
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}
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//!
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//! \brief Builds the network engine
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//!
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bool build(int32_t dataWidth);
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//!
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//! \brief Verify the built engine I/O types and formats.
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//!
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bool verify(TypeSpec const& spec);
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//!
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//! \brief Runs the TensorRT inference engine for this sample
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//!
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bool infer(SampleBuffer& inputBuf, SampleBuffer& outputBuf);
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private:
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//!
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//! \brief Parses an ONNX model for MNIST and creates a TensorRT network
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//!
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bool constructNetwork(std::unique_ptr<nvinfer1::IBuilder>& builder,
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std::unique_ptr<nvinfer1::INetworkDefinition>& network, std::unique_ptr<nvinfer1::IBuilderConfig>& config,
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std::unique_ptr<nvonnxparser::IParser>& parser);
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std::unique_ptr<IRuntime> mRuntime{}; //!< The TensorRT Runtime used to deserialize the engine.
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std::shared_ptr<nvinfer1::ICudaEngine> mEngine{nullptr}; //!< The TensorRT engine used to run the network
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public:
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samplesCommon::OnnxSampleParams mParams;
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nvinfer1::Dims mInputDims; //!< The dimensions of the input to the network.
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nvinfer1::Dims mOutputDims; //!< The dimensions of the output to the network.
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TensorFormat mTensorFormat{TensorFormat::kLINEAR};
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int32_t mDigit;
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};
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//!
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//! \brief Validates engine I/O datatypes and formats against a reference.
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//!
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//! \details This function queries I/O datatype and format description from the built engine.
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//! Validating them is sufficient to ensure that `ITensor::setAllowedFormats` API as
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//! expected.
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//!
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//! \return true if type and format validation succeeds.
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//!
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bool SampleIOFormats::verify(TypeSpec const& spec)
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{
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assert(mEngine->getNbIOTensors() == 2);
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char const* inputName = mEngine->getIOTensorName(0);
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char const* outputName = mEngine->getIOTensorName(1);
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auto verifyType = [](DataType actual, DataType expected) {
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if (actual != expected)
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{
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sample::gLogError << "Expected " << expected << " data type, got " << actual;
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return false;
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}
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return true;
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};
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if (!verifyType(mEngine->getTensorDataType(inputName), spec.dtype))
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{
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return false;
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}
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if (!verifyType(mEngine->getTensorDataType(outputName), spec.dtype))
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{
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return false;
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}
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auto verifyFormat = [](std::string actual, std::string expected) {
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if (expected.find(actual) != std::string::npos)
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{
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sample::gLogError << "Expected " << expected << " format, got " << actual;
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return false;
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}
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return true;
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};
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if (!verifyFormat(std::string(mEngine->getTensorFormatDesc(inputName)), spec.formatName))
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{
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return false;
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}
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if (!verifyFormat(std::string(mEngine->getTensorFormatDesc(inputName)), "kLINEAR"))
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{
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return false;
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}
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return true;
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}
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//!
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//! \brief Creates the network, configures the builder and creates the network engine
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//!
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//! \details This function creates the single layer network by manual insertion and builds
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//! the engine
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//!
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//! \return true if the engine was created successfully and false otherwise
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//!
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bool SampleIOFormats::build(int32_t dataWidth)
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{
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auto builder = std::unique_ptr<nvinfer1::IBuilder>(nvinfer1::createInferBuilder(sample::gLogger.getTRTLogger()));
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if (!builder)
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{
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return false;
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}
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auto network = std::unique_ptr<nvinfer1::INetworkDefinition>(
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builder->createNetworkV2(1U << static_cast<uint32_t>(NetworkDefinitionCreationFlag::kSTRONGLY_TYPED)));
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if (!network)
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{
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return false;
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}
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auto config = std::unique_ptr<nvinfer1::IBuilderConfig>(builder->createBuilderConfig());
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if (!config)
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{
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return false;
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}
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auto parser
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= std::unique_ptr<nvonnxparser::IParser>(nvonnxparser::createParser(*network, sample::gLogger.getTRTLogger()));
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if (!parser)
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{
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return false;
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}
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auto constructed = constructNetwork(builder, network, config, parser);
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if (!constructed)
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{
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return false;
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}
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network->getInput(0)->setAllowedFormats(static_cast<TensorFormats>(1 << static_cast<int32_t>(mTensorFormat)));
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network->getOutput(0)->setAllowedFormats(1U << static_cast<int32_t>(TensorFormat::kLINEAR));
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mEngine.reset();
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config->setFlag(BuilderFlag::kGPU_FALLBACK);
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// CUDA stream used for profiling by the builder.
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auto profileStream = samplesCommon::makeCudaStream();
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if (!profileStream)
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{
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return false;
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}
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config->setProfileStream(*profileStream);
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std::unique_ptr<nvinfer1::ITimingCache> timingCache{};
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// Load timing cache
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if (!mParams.timingCacheFile.empty())
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{
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timingCache
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= samplesCommon::buildTimingCacheFromFile(sample::gLogger.getTRTLogger(), *config, mParams.timingCacheFile);
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}
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std::unique_ptr<IHostMemory> plan{builder->buildSerializedNetwork(*network, *config)};
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if (!plan)
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{
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return false;
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}
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if (timingCache != nullptr && !mParams.timingCacheFile.empty())
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{
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samplesCommon::updateTimingCacheFile(
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sample::gLogger.getTRTLogger(), mParams.timingCacheFile, timingCache.get(), *builder);
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}
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if (!mRuntime)
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{
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mRuntime = std::unique_ptr<IRuntime>(createInferRuntime(sample::gLogger.getTRTLogger()));
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}
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if (!mRuntime)
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{
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return false;
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}
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mEngine = std::shared_ptr<nvinfer1::ICudaEngine>(mRuntime->deserializeCudaEngine(plan->data(), plan->size()));
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if (!mEngine)
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{
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return false;
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}
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ASSERT(network->getNbInputs() == 1);
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mInputDims = network->getInput(0)->getDimensions();
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ASSERT(mInputDims.nbDims == 4);
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ASSERT(network->getNbOutputs() == 1);
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mOutputDims = network->getOutput(0)->getDimensions();
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ASSERT(mOutputDims.nbDims == 2);
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return true;
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}
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//!
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//! \brief Uses a ONNX parser to create the Onnx MNIST Network and marks the
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//! output layers
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//!
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//! \param network Pointer to the network that will be populated with the Onnx MNIST network
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//!
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//! \param builder Pointer to the engine builder
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//!
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bool SampleIOFormats::constructNetwork(std::unique_ptr<nvinfer1::IBuilder>& builder,
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std::unique_ptr<nvinfer1::INetworkDefinition>& network, std::unique_ptr<nvinfer1::IBuilderConfig>& config,
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std::unique_ptr<nvonnxparser::IParser>& parser)
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{
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auto parsed = parser->parseFromFile(samplesCommon::locateFile(mParams.onnxFileName, mParams.dataDirs).c_str(),
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static_cast<int32_t>(sample::gLogger.getReportableSeverity()));
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if (!parsed)
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{
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return false;
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}
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samplesCommon::enableDLA(builder.get(), config.get(), mParams.dlaCore);
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return true;
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}
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//!
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//! \brief Runs the TensorRT inference engine for this sample
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//!
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//! \details This function is the main execution function of the sample. It allocates
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//! the buffer, sets inputs, executes the engine, and verifies the output.
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//!
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bool SampleIOFormats::infer(SampleBuffer& inputBuf, SampleBuffer& outputBuf)
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{
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auto const devInput = mallocCudaMem<uint8_t>(inputBuf.getBufferSize());
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auto devOutput = mallocCudaMem<uint8_t>(outputBuf.getBufferSize());
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CHECK(cudaMemcpy(devInput.get(), inputBuf.buffer.get(), inputBuf.getBufferSize(), cudaMemcpyHostToDevice));
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auto context = std::unique_ptr<nvinfer1::IExecutionContext>(mEngine->createExecutionContext());
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if (!context)
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{
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return false;
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}
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for (int32_t i = 0, e = mEngine->getNbIOTensors(); i < e; i++)
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{
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auto const name = mEngine->getIOTensorName(i);
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if (mEngine->getTensorIOMode(name) == TensorIOMode::kINPUT)
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{
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context->setTensorAddress(name, devInput.get());
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}
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else
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{
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context->setTensorAddress(name, devOutput.get());
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}
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}
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// Create CUDA stream for the execution of this inference.
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cudaStream_t stream;
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CHECK(cudaStreamCreate(&stream));
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// Asynchronously enqueue the inference work
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if (!context->enqueueV3(stream))
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{
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return false;
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}
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// Wait for the work in the stream to complete
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CHECK(cudaStreamSynchronize(stream));
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// Release stream
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CHECK(cudaStreamDestroy(stream));
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CHECK(cudaMemcpy(outputBuf.buffer.get(), devOutput.get(), outputBuf.getBufferSize(), cudaMemcpyDeviceToHost));
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return true;
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}
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//!
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//! \brief Initializes members of the params struct using the command line args
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//!
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samplesCommon::OnnxSampleParams initializeSampleParams(samplesCommon::Args const& args)
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{
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samplesCommon::OnnxSampleParams params;
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if (args.dataDirs.empty()) // Use default directories if user hasn't provided directory paths
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{
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params.dataDirs.push_back("data/mnist/");
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params.dataDirs.push_back("data/samples/mnist/");
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}
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else // Use the data directory provided by the user
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{
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params.dataDirs = args.dataDirs;
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}
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params.onnxFileName = "mnist.onnx";
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params.dlaCore = args.useDLACore;
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params.timingCacheFile = args.timingCacheFile;
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return params;
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}
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//!
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//! \brief Prints the help information for running this sample
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//!
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void printHelpInfo()
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{
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std::cout
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<< "Usage: ./sample_onnx_mnist [-h or --help] [-d or --datadir=<path to data directory>] [--useDLACore=<int>] "
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<< "[-t or --timingCacheFile=<path to timing cache file>]" << std::endl;
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std::cout << "--help Display help information" << std::endl;
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std::cout << "--datadir Specify path to a data directory, overriding the default. This option can be used "
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"multiple times to add multiple directories. If no data directories are given, the default is to use "
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"(data/samples/mnist/, data/mnist/)"
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<< std::endl;
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std::cout << "--useDLACore=N Specify a DLA engine for layers that support DLA. Value can range from 0 to n-1, "
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"where n is the number of DLA engines on the platform."
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<< std::endl;
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std::cout << "--timingCacheFile Specify path to a timing cache file. If it does not already exist, it will be "
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<< "created." << std::endl;
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}
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//!
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//! \brief Used to run the engine build and inference/reference functions
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//!
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template <typename T>
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bool process(SampleIOFormats& sample, sample::Logger::TestAtom const& sampleTest, SampleBuffer& inputBuf,
|
|
SampleBuffer& outputBuf, TypeSpec& spec)
|
|
{
|
|
sample::gLogInfo << "Building and running a GPU inference engine with specified I/O formats." << std::endl;
|
|
|
|
if (!sample.build(sizeof(T)))
|
|
{
|
|
return false;
|
|
}
|
|
if (!sample.verify(spec))
|
|
{
|
|
return false;
|
|
}
|
|
|
|
inputBuf = SampleBuffer(sample.mInputDims, sizeof(T), sample.mTensorFormat, true);
|
|
outputBuf = SampleBuffer(sample.mOutputDims, sizeof(T), TensorFormat::kLINEAR, false);
|
|
|
|
if (!sample.infer(inputBuf, outputBuf))
|
|
{
|
|
return false;
|
|
}
|
|
return true;
|
|
}
|
|
|
|
int32_t main(int32_t argc, char** argv)
|
|
{
|
|
samplesCommon::Args args;
|
|
bool argsOK = samplesCommon::parseArgs(args, argc, argv);
|
|
if (!argsOK)
|
|
{
|
|
sample::gLogError << "Invalid arguments" << std::endl;
|
|
printHelpInfo();
|
|
return EXIT_FAILURE;
|
|
}
|
|
if (args.help)
|
|
{
|
|
printHelpInfo();
|
|
return EXIT_SUCCESS;
|
|
}
|
|
|
|
auto sampleTest = sample::gLogger.defineTest(gSampleName, argc, argv);
|
|
|
|
sample::gLogger.reportTestStart(sampleTest);
|
|
|
|
samplesCommon::OnnxSampleParams params = initializeSampleParams(args);
|
|
|
|
std::vector<TypeSpec> fp32TypeSpec = {
|
|
TypeSpec{DataType::kFLOAT, TensorFormat::kLINEAR, "kLINEAR"},
|
|
TypeSpec{DataType::kFLOAT, TensorFormat::kHWC, "kHWC"},
|
|
TypeSpec{DataType::kFLOAT, TensorFormat::kCHW32, "kCHW32"},
|
|
};
|
|
|
|
SampleIOFormats sample(params);
|
|
|
|
sample::gLogInfo
|
|
<< "Build TRT engine with different IO data type and formats. Ensure that built engine abide by them"
|
|
<< std::endl;
|
|
|
|
// Test FP32 formats
|
|
for (auto spec : fp32TypeSpec)
|
|
{
|
|
sample::gLogInfo << "Testing datatype FP32 with format " << spec.formatName << std::endl;
|
|
sample.mTensorFormat = spec.format;
|
|
SampleBuffer inputBuf, outputBuf;
|
|
|
|
if (!process<float>(sample, sampleTest, inputBuf, outputBuf, spec))
|
|
{
|
|
return sample::gLogger.reportFail(sampleTest);
|
|
}
|
|
}
|
|
|
|
return sample::gLogger.reportPass(sampleTest);
|
|
}
|