wehub-resource-sync
476 lines
18 KiB
Metal
476 lines
18 KiB
Metal
// ============================================================
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// W8A8 INT8×INT8→INT32 TensorOps GEMM
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// Target: Apple M5 (G17G), Metal 4
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//
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// Variants:
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// - fused dequant: INT8×INT8→FP16, with per-token/per-channel scales
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// - raw INT32: INT8×INT8→INT32, no scale (pure integer GEMM)
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// Multi-config: large (BM=128) and small (BM=32) tiles
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// Swizzle dispatch for L2 cache locality
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//
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// matmul2d(16,32,16) via MPP cooperative_tensor
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// ============================================================
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#include <MetalPerformancePrimitives/MetalPerformancePrimitives.h>
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#include <metal_stdlib>
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using namespace metal;
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// ── NAXFrag layout constants ────────────────────────────────────
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constant constexpr short kElemsPerFrag = 8;
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constant constexpr short kElemCols = 4;
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constant constexpr short kElemRowsJump = 8;
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// ── NAXFrag coordinate mapping ──────────────────────────────────
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inline short2 nax_get_coord(ushort lid) {
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short qid = short(lid >> 2);
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short fm = ((qid & 4) | ((short(lid) >> 1) & 3));
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short fn = ((qid & 2) | (short(lid) & 1)) * 4;
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return short2{fn, fm};
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}
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// ── Fragment load: device → register ────────────────────────────
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template <typename T>
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inline void nax_frag_load(thread T *dst, const device T *src, int ld, short2 sc,
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short off_m = 0, short off_n = 0) {
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src += (sc.y + off_m) * ld + (sc.x + off_n);
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for (short i = 0; i < 2; i++) {
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for (short j = 0; j < kElemCols; j++) {
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dst[i * kElemCols + j] = src[(i * kElemRowsJump) * ld + j];
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}
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}
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}
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// ── Fragment store: raw INT32 (no dequant) ───────────────────
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inline void nax_frag_store_int32(const thread int32_t *src, device int32_t *dst,
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int ld, short2 sc, short off_m, short off_n,
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uint M, uint N, uint m_base, uint n_base) {
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for (short i = 0; i < 2; i++) {
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for (short j = 0; j < kElemCols; j++) {
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uint mi = m_base + sc.y + off_m + i * kElemRowsJump;
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uint ni = n_base + sc.x + off_n + j;
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if (mi < M && ni < N) {
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dst[(sc.y + off_m + i * kElemRowsJump) * ld + (sc.x + off_n + j)] =
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src[i * kElemCols + j];
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}
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}
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}
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}
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// ── Fragment store with bounds check and dequant ────────────────
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inline void nax_frag_store_dequant(const thread int32_t *src, device half *dst,
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int ld, short2 sc, short off_m, short off_n,
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uint M, uint N, uint m_base, uint n_base,
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const device float *scale_a,
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const device float *scale_w) {
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for (short i = 0; i < 2; i++) {
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for (short j = 0; j < kElemCols; j++) {
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uint mi = m_base + sc.y + off_m + i * kElemRowsJump;
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uint ni = n_base + sc.x + off_n + j;
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if (mi < M && ni < N) {
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float val = float(src[i * kElemCols + j]) * scale_a[mi] * scale_w[ni];
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dst[(sc.y + off_m + i * kElemRowsJump) * ld + (sc.x + off_n + j)] =
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half(val);
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}
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}
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}
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}
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// ── Generic GEMM kernel ─────────────────────────────────────────
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// Template params: BM, BN, BK, SK, WM, WN
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// Each SG computes SM×SN = (BM/WM) × (BN/WN) output
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// SM and SN must be 32 (2×2 of 16×16 fragments)
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//
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// swizzle_log: passed via constant buffer
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// tid_y = (tgid.y << swizzle_log) + (tgid.x & ((1<<swizzle_log)-1))
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// tid_x = tgid.x >> swizzle_log
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template <int BM, int BN, int BK, int SK, int WM, int WN>
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void w8a8_gemm_impl(const device int8_t *A, const device int8_t *B,
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device half *C, uint M, uint N, uint K,
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const device float *scale_a, const device float *scale_w,
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uint swizzle_log, uint tiles_m, uint tiles_n, uint2 tgid,
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uint sgid, uint lid) {
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constexpr int SM = BM / WM; // 32
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constexpr int SN = BN / WN; // 32
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constexpr short TM = SM / 16; // 2
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constexpr short TN = SN / 16; // 2
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constexpr short TK = SK / 16; // 2
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// Swizzle decode
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uint tid_y = (tgid.y << swizzle_log) + (tgid.x & ((1u << swizzle_log) - 1u));
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uint tid_x = tgid.x >> swizzle_log;
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// Bounds check (swizzle can create out-of-bounds tiles)
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if (tid_x >= tiles_n || tid_y >= tiles_m) {
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return;
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}
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short2 sc = nax_get_coord(ushort(lid));
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uint sg_row = sgid / WN;
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uint sg_col = sgid % WN;
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uint m_base = tid_y * BM + sg_row * SM;
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uint n_base = tid_x * BN + sg_col * SN;
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const device int8_t *sg_A = A + m_base * K;
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const device int8_t *sg_B = B + n_base;
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constexpr auto desc = mpp::tensor_ops::matmul2d_descriptor(
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16, 32, 16, false, false, true,
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mpp::tensor_ops::matmul2d_descriptor::mode::multiply_accumulate);
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mpp::tensor_ops::matmul2d<desc, metal::execution_simdgroup> gemm_op;
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auto ct_a =
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gemm_op.get_left_input_cooperative_tensor<int8_t, int8_t, int32_t>();
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auto ct_b =
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gemm_op.get_right_input_cooperative_tensor<int8_t, int8_t, int32_t>();
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auto ct_c =
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gemm_op.get_destination_cooperative_tensor<decltype(ct_a), decltype(ct_b),
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int32_t>();
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int32_t c_frags[TM * TN][kElemsPerFrag];
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for (int f = 0; f < TM * TN; f++) {
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for (int i = 0; i < kElemsPerFrag; i++) {
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c_frags[f][i] = 0;
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}
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}
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// ── Main K loop ─────────────────────────────────────────────
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int gemm_k_iters = int(K) / BK;
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for (int kk0 = 0; kk0 < gemm_k_iters; kk0++) {
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threadgroup_barrier(mem_flags::mem_none);
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for (int kk1 = 0; kk1 < BK; kk1 += SK) {
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int8_t a_frags[TM][TK][kElemsPerFrag];
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int8_t b_frags[TK][TN][kElemsPerFrag];
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volatile int compiler_barrier;
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for (short mm = 0; mm < TM; mm++) {
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for (short kk = 0; kk < TK; kk++) {
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nax_frag_load(a_frags[mm][kk], sg_A + kk1, int(K), sc, short(mm * 16),
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short(kk * 16));
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}
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}
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for (short kk = 0; kk < TK; kk++) {
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for (short nn = 0; nn < TN; nn++) {
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nax_frag_load(b_frags[kk][nn], sg_B + kk1 * N, int(N), sc,
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short(kk * 16), short(nn * 16));
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}
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}
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for (short mm = 0; mm < TM; mm++) {
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for (short nn = 0; nn < TN; nn += 2) {
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for (short kk = 0; kk < TK; kk++) {
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for (short i = 0; i < kElemsPerFrag; i++) {
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ct_a[i] = a_frags[mm][kk][i];
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}
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for (short i = 0; i < kElemsPerFrag; i++) {
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ct_b[i] = b_frags[kk][nn][i];
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ct_b[kElemsPerFrag + i] = b_frags[kk][nn + 1][i];
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}
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short c0 = mm * TN + nn, c1 = c0 + 1;
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for (short i = 0; i < kElemsPerFrag; i++) {
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ct_c[i] = c_frags[c0][i];
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ct_c[kElemsPerFrag + i] = c_frags[c1][i];
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}
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gemm_op.run(ct_a, ct_b, ct_c);
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for (short i = 0; i < kElemsPerFrag; i++) {
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c_frags[c0][i] = ct_c[i];
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c_frags[c1][i] = ct_c[kElemsPerFrag + i];
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}
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}
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}
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}
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(void)compiler_barrier;
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}
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sg_A += BK;
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sg_B += BK * N;
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}
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// ── Remainder K ─────────────────────────────────────────────
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int rem_k = int(K) - gemm_k_iters * BK;
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for (int kk1 = 0; kk1 < rem_k; kk1 += 16) {
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int8_t a_frag[TM][kElemsPerFrag];
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int8_t b_frag[TN][kElemsPerFrag];
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short psk = short(max(0, rem_k - kk1));
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for (short mm = 0; mm < TM; mm++) {
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const device int8_t *ptr = sg_A + kk1 + (sc.y + mm * 16) * K + sc.x;
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for (short i = 0; i < 2; i++) {
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for (short j = 0; j < kElemCols; j++) {
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short ki = short(sc.x + j);
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a_frag[mm][i * kElemCols + j] =
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(ki < psk) ? ptr[(i * kElemRowsJump) * K + j] : int8_t(0);
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}
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}
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}
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for (short nn = 0; nn < TN; nn++) {
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const device int8_t *ptr = sg_B + kk1 * N + nn * 16 + sc.y * N + sc.x;
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for (short i = 0; i < 2; i++) {
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for (short j = 0; j < kElemCols; j++) {
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short ki = short(sc.y + i * kElemRowsJump);
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b_frag[nn][i * kElemCols + j] =
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(ki < psk) ? ptr[(i * kElemRowsJump) * N + j] : int8_t(0);
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}
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}
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}
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for (short mm = 0; mm < TM; mm++) {
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for (short i = 0; i < kElemsPerFrag; i++) {
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ct_a[i] = a_frag[mm][i];
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}
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for (short i = 0; i < kElemsPerFrag; i++) {
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ct_b[i] = b_frag[0][i];
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ct_b[kElemsPerFrag + i] = b_frag[1][i];
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}
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short c0 = mm * TN, c1 = c0 + 1;
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for (short i = 0; i < kElemsPerFrag; i++) {
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ct_c[i] = c_frags[c0][i];
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ct_c[kElemsPerFrag + i] = c_frags[c1][i];
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}
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gemm_op.run(ct_a, ct_b, ct_c);
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for (short i = 0; i < kElemsPerFrag; i++) {
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c_frags[c0][i] = ct_c[i];
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c_frags[c1][i] = ct_c[kElemsPerFrag + i];
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}
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}
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}
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// ── Store with fused dequant ────────────────────────────────
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device half *D = C + m_base * N + n_base;
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for (short mm = 0; mm < TM; mm++) {
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for (short nn = 0; nn < TN; nn++) {
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nax_frag_store_dequant(c_frags[mm * TN + nn], D, int(N), sc,
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short(mm * 16), short(nn * 16), M, N, m_base,
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n_base, scale_a, scale_w);
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}
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}
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}
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// ============================================================
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// Kernel entry points
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// ============================================================
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// ── Large tile: BM=128, BN=128, BK=512, WM=4, WN=4 ────────────
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// 16 SG, 512 threads/TG. Best for M≥128.
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kernel void w8a8_matmul_fused_dequant(
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const device int8_t *A [[buffer(0)]], const device int8_t *B [[buffer(1)]],
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device half *C [[buffer(2)]], constant uint &M [[buffer(3)]],
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constant uint &N [[buffer(4)]], constant uint &K [[buffer(5)]],
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const device float *scale_a [[buffer(6)]],
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const device float *scale_w [[buffer(7)]],
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constant uint &swizzle_log [[buffer(8)]],
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constant uint &tiles_m [[buffer(9)]], constant uint &tiles_n [[buffer(10)]],
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uint2 tgid [[threadgroup_position_in_grid]],
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uint sgid [[simdgroup_index_in_threadgroup]],
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uint lid [[thread_index_in_simdgroup]]) {
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w8a8_gemm_impl<128, 128, 512, 32, 4, 4>(A, B, C, M, N, K, scale_a, scale_w,
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swizzle_log, tiles_m, tiles_n, tgid,
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sgid, lid);
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}
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// ── Small tile: BM=32, BN=128, BK=512, WM=1, WN=4 ─────────────
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// 4 SG, 128 threads/TG. Optimized for M≤64.
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kernel void w8a8_matmul_fused_dequant_small(
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const device int8_t *A [[buffer(0)]], const device int8_t *B [[buffer(1)]],
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device half *C [[buffer(2)]], constant uint &M [[buffer(3)]],
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constant uint &N [[buffer(4)]], constant uint &K [[buffer(5)]],
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const device float *scale_a [[buffer(6)]],
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const device float *scale_w [[buffer(7)]],
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constant uint &swizzle_log [[buffer(8)]],
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constant uint &tiles_m [[buffer(9)]], constant uint &tiles_n [[buffer(10)]],
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uint2 tgid [[threadgroup_position_in_grid]],
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uint sgid [[simdgroup_index_in_threadgroup]],
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uint lid [[thread_index_in_simdgroup]]) {
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w8a8_gemm_impl<32, 128, 512, 32, 1, 4>(A, B, C, M, N, K, scale_a, scale_w,
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swizzle_log, tiles_m, tiles_n, tgid,
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sgid, lid);
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}
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// ============================================================
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// Raw INT32 GEMM impl (no dequant, no scales)
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// ============================================================
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template <int BM, int BN, int BK, int SK, int WM, int WN>
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void w8a8_gemm_int32_impl(const device int8_t *A, const device int8_t *B,
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device int32_t *C, uint M, uint N, uint K,
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uint swizzle_log, uint tiles_m, uint tiles_n,
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uint2 tgid, uint sgid, uint lid) {
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constexpr int SM = BM / WM;
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constexpr int SN = BN / WN;
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constexpr short TM = SM / 16;
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constexpr short TN = SN / 16;
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constexpr short TK = SK / 16;
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uint tid_y = (tgid.y << swizzle_log) + (tgid.x & ((1u << swizzle_log) - 1u));
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uint tid_x = tgid.x >> swizzle_log;
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if (tid_x >= tiles_n || tid_y >= tiles_m) {
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return;
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}
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short2 sc = nax_get_coord(ushort(lid));
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uint sg_row = sgid / WN;
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uint sg_col = sgid % WN;
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uint m_base = tid_y * BM + sg_row * SM;
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uint n_base = tid_x * BN + sg_col * SN;
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const device int8_t *sg_A = A + m_base * K;
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const device int8_t *sg_B = B + n_base;
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constexpr auto desc = mpp::tensor_ops::matmul2d_descriptor(
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16, 32, 16, false, false, true,
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mpp::tensor_ops::matmul2d_descriptor::mode::multiply_accumulate);
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mpp::tensor_ops::matmul2d<desc, metal::execution_simdgroup> gemm_op;
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auto ct_a =
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gemm_op.get_left_input_cooperative_tensor<int8_t, int8_t, int32_t>();
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auto ct_b =
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gemm_op.get_right_input_cooperative_tensor<int8_t, int8_t, int32_t>();
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auto ct_c =
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gemm_op.get_destination_cooperative_tensor<decltype(ct_a), decltype(ct_b),
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int32_t>();
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int32_t c_frags[TM * TN][kElemsPerFrag];
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for (int f = 0; f < TM * TN; f++) {
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for (int i = 0; i < kElemsPerFrag; i++) {
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c_frags[f][i] = 0;
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}
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}
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int gemm_k_iters = int(K) / BK;
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for (int kk0 = 0; kk0 < gemm_k_iters; kk0++) {
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threadgroup_barrier(mem_flags::mem_none);
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for (int kk1 = 0; kk1 < BK; kk1 += SK) {
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int8_t a_frags[TM][TK][kElemsPerFrag];
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int8_t b_frags[TK][TN][kElemsPerFrag];
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volatile int compiler_barrier;
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for (short mm = 0; mm < TM; mm++) {
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for (short kk = 0; kk < TK; kk++) {
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nax_frag_load(a_frags[mm][kk], sg_A + kk1, int(K), sc, short(mm * 16),
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short(kk * 16));
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}
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}
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for (short kk = 0; kk < TK; kk++) {
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for (short nn = 0; nn < TN; nn++) {
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nax_frag_load(b_frags[kk][nn], sg_B + kk1 * N, int(N), sc,
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short(kk * 16), short(nn * 16));
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}
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}
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for (short mm = 0; mm < TM; mm++) {
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for (short nn = 0; nn < TN; nn += 2) {
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for (short kk = 0; kk < TK; kk++) {
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for (short i = 0; i < kElemsPerFrag; i++) {
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ct_a[i] = a_frags[mm][kk][i];
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}
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for (short i = 0; i < kElemsPerFrag; i++) {
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ct_b[i] = b_frags[kk][nn][i];
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ct_b[kElemsPerFrag + i] = b_frags[kk][nn + 1][i];
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}
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short c0 = mm * TN + nn, c1 = c0 + 1;
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for (short i = 0; i < kElemsPerFrag; i++) {
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ct_c[i] = c_frags[c0][i];
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ct_c[kElemsPerFrag + i] = c_frags[c1][i];
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}
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gemm_op.run(ct_a, ct_b, ct_c);
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for (short i = 0; i < kElemsPerFrag; i++) {
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c_frags[c0][i] = ct_c[i];
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c_frags[c1][i] = ct_c[kElemsPerFrag + i];
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}
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}
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}
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}
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(void)compiler_barrier;
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}
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sg_A += BK;
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sg_B += BK * N;
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}
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// Remainder K
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int rem_k = int(K) - gemm_k_iters * BK;
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for (int kk1 = 0; kk1 < rem_k; kk1 += 16) {
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int8_t a_frag[TM][kElemsPerFrag];
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int8_t b_frag[TN][kElemsPerFrag];
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short psk = short(max(0, rem_k - kk1));
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for (short mm = 0; mm < TM; mm++) {
|
||
const device int8_t *ptr = sg_A + kk1 + (sc.y + mm * 16) * K + sc.x;
|
||
for (short i = 0; i < 2; i++) {
|
||
for (short j = 0; j < kElemCols; j++) {
|
||
short ki = short(sc.x + j);
|
||
a_frag[mm][i * kElemCols + j] =
|
||
(ki < psk) ? ptr[(i * kElemRowsJump) * K + j] : int8_t(0);
|
||
}
|
||
}
|
||
}
|
||
for (short nn = 0; nn < TN; nn++) {
|
||
const device int8_t *ptr = sg_B + kk1 * N + nn * 16 + sc.y * N + sc.x;
|
||
for (short i = 0; i < 2; i++) {
|
||
for (short j = 0; j < kElemCols; j++) {
|
||
short ki = short(sc.y + i * kElemRowsJump);
|
||
b_frag[nn][i * kElemCols + j] =
|
||
(ki < psk) ? ptr[(i * kElemRowsJump) * N + j] : int8_t(0);
|
||
}
|
||
}
|
||
}
|
||
for (short mm = 0; mm < TM; mm++) {
|
||
for (short i = 0; i < kElemsPerFrag; i++) {
|
||
ct_a[i] = a_frag[mm][i];
|
||
}
|
||
for (short i = 0; i < kElemsPerFrag; i++) {
|
||
ct_b[i] = b_frag[0][i];
|
||
ct_b[kElemsPerFrag + i] = b_frag[1][i];
|
||
}
|
||
short c0 = mm * TN, c1 = c0 + 1;
|
||
for (short i = 0; i < kElemsPerFrag; i++) {
|
||
ct_c[i] = c_frags[c0][i];
|
||
ct_c[kElemsPerFrag + i] = c_frags[c1][i];
|
||
}
|
||
gemm_op.run(ct_a, ct_b, ct_c);
|
||
for (short i = 0; i < kElemsPerFrag; i++) {
|
||
c_frags[c0][i] = ct_c[i];
|
||
c_frags[c1][i] = ct_c[kElemsPerFrag + i];
|
||
}
|
||
}
|
||
}
|
||
|
||
// Store raw INT32
|
||
device int32_t *D = C + m_base * N + n_base;
|
||
for (short mm = 0; mm < TM; mm++) {
|
||
for (short nn = 0; nn < TN; nn++) {
|
||
nax_frag_store_int32(c_frags[mm * TN + nn], D, int(N), sc, short(mm * 16),
|
||
short(nn * 16), M, N, m_base, n_base);
|
||
}
|
||
}
|
||
}
|
||
|
||
// ============================================================
|
||
// Kernel entry points — raw INT32 output
|
||
// ============================================================
|
||
|
||
kernel void int8_matmul_int32(
|
||
const device int8_t *A [[buffer(0)]], const device int8_t *B [[buffer(1)]],
|
||
device int32_t *C [[buffer(2)]], constant uint &M [[buffer(3)]],
|
||
constant uint &N [[buffer(4)]], constant uint &K [[buffer(5)]],
|
||
constant uint &swizzle_log [[buffer(6)]],
|
||
constant uint &tiles_m [[buffer(7)]], constant uint &tiles_n [[buffer(8)]],
|
||
uint2 tgid [[threadgroup_position_in_grid]],
|
||
uint sgid [[simdgroup_index_in_threadgroup]],
|
||
uint lid [[thread_index_in_simdgroup]]) {
|
||
w8a8_gemm_int32_impl<128, 128, 512, 32, 4, 4>(
|
||
A, B, C, M, N, K, swizzle_log, tiles_m, tiles_n, tgid, sgid, lid);
|
||
}
|
||
|
||
kernel void int8_matmul_int32_small(
|
||
const device int8_t *A [[buffer(0)]], const device int8_t *B [[buffer(1)]],
|
||
device int32_t *C [[buffer(2)]], constant uint &M [[buffer(3)]],
|
||
constant uint &N [[buffer(4)]], constant uint &K [[buffer(5)]],
|
||
constant uint &swizzle_log [[buffer(6)]],
|
||
constant uint &tiles_m [[buffer(7)]], constant uint &tiles_n [[buffer(8)]],
|
||
uint2 tgid [[threadgroup_position_in_grid]],
|
||
uint sgid [[simdgroup_index_in_threadgroup]],
|
||
uint lid [[thread_index_in_simdgroup]]) {
|
||
w8a8_gemm_int32_impl<32, 128, 512, 32, 1, 4>(
|
||
A, B, C, M, N, K, swizzle_log, tiles_m, tiles_n, tgid, sgid, lid);
|
||
}
|