wehub-resource-sync
228 lines
7.1 KiB
C
228 lines
7.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdint.h>
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#include <string.h>
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#include "esp_private/esp_system_attr.h"
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#include "esp_err.h"
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#include "esp_compiler.h"
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#include "esp_macros.h"
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#include "esp_system.h"
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#include "esp_log.h"
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#include "sdkconfig.h"
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#include "soc/soc_caps.h"
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#include "esp_cpu.h"
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#include "esp_private/startup_internal.h"
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#include "esp_private/esp_sys_event_internal.h"
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// Ensure that system configuration matches the underlying number of cores.
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// This should enable us to avoid checking for both every time.
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#if !(SOC_CPU_CORES_NUM > 1) && !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
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#error "System has been configured to run on multiple cores, but target SoC only has a single core."
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#endif
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uint64_t g_startup_time = 0;
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// App entry point for core 0
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extern void esp_startup_start_app(void);
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// Entry point for core 0 from hardware init (port layer)
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#if defined(__APPLE__) && defined(__MACH__)
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static void start_cpu0_default(void);
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__attribute__((weak, noreturn)) void start_cpu0(void)
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{
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start_cpu0_default();
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__builtin_unreachable();
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}
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#else
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void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default"))) __attribute__((noreturn));
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#endif
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#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
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// Entry point for core [1..X] from hardware init (port layer)
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#if defined(__APPLE__) && defined(__MACH__)
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static void start_cpu_other_cores_default(void);
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__attribute__((weak, noreturn)) void start_cpu_other_cores(void)
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{
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start_cpu_other_cores_default();
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__builtin_unreachable();
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}
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#else
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void start_cpu_other_cores(void) __attribute__((weak, alias("start_cpu_other_cores_default"))) __attribute__((noreturn));
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#endif
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// App entry point for core [1..X]
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#if defined(__APPLE__) && defined(__MACH__)
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static void esp_startup_start_app_other_cores_default(void);
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__attribute__((weak, noreturn)) void esp_startup_start_app_other_cores(void)
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{
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esp_startup_start_app_other_cores_default();
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__builtin_unreachable();
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}
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#else
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void esp_startup_start_app_other_cores(void) __attribute__((weak, alias("esp_startup_start_app_other_cores_default"))) __attribute__((noreturn));
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#endif
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static volatile bool s_system_inited[SOC_CPU_CORES_NUM] = { false };
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const sys_startup_fn_t g_startup_fn[SOC_CPU_CORES_NUM] = { [0] = start_cpu0,
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#if SOC_CPU_CORES_NUM > 1
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[1 ... SOC_CPU_CORES_NUM - 1] = start_cpu_other_cores
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#endif
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};
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static volatile bool s_system_full_inited = false;
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#else
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const sys_startup_fn_t g_startup_fn[1] = { start_cpu0 };
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#endif
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ESP_LOG_ATTR_TAG(TAG, "cpu_start");
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#if CONFIG_COMPILER_CXX_EXCEPTIONS && !CONFIG_IDF_TARGET_LINUX
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/**
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* @brief A helper function for __do_global_ctors, which is in crtend.o.
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* It has been adapted from GCC source code. In GCC, it resides under
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* the USE_EH_FRAME_REGISTRY macro, which is not enabled in Espressif
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* toolchains to save small memory amount. Nevertheless, when C++ exceptions
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* are enabled this initialization becomes necessary.
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*/
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static void __do_global_ctors_1(void)
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{
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struct object {
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long placeholder[10];
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};
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void __register_frame_info(const void *begin, struct object * ob);
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extern char __eh_frame[];
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static struct object ob;
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__register_frame_info(__eh_frame, &ob);
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}
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#endif // CONFIG_COMPILER_CXX_EXCEPTIONS && !CONFIG_IDF_TARGET_LINUX
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static void do_system_init_event(esp_sys_event_id_t id)
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{
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int core_id = esp_cpu_get_core_id();
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ESP_SYS_EVENT_FOREACH(h, id) {
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// During core init, stdout is not initialized yet, so use early logging.
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ESP_EARLY_LOGD(TAG, "calling init function: %p on core: %d", (void *)h->handler, core_id);
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esp_err_t err = h->handler(NULL, NULL);
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if (err != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "init function %p has failed (0x%x), aborting", (void *)h->handler, err);
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abort();
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}
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}
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#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
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s_system_inited[core_id] = true;
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#endif
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}
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#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
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static void esp_startup_start_app_other_cores_default(void)
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{
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while (1) {
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esp_rom_delay_us(UINT32_MAX);
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}
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}
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/* This function has to be in IRAM, as while it is running on CPU1, CPU0 may do some flash operations
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* (e.g. initialize the core dump), which means that cache will be disabled.
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*/
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static void ESP_SYSTEM_IRAM_ATTR start_cpu_other_cores_default(void)
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{
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// Run secondary init handlers for this core. Core-scoped handlers skip
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// themselves inside their registration wrappers.
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do_system_init_event(ESP_SYS_EVENT_SYSTEM_INIT_SECONDARY);
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while (!s_system_full_inited) {
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esp_rom_delay_us(100);
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}
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esp_startup_start_app_other_cores();
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}
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#endif
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static void do_core_init(void)
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{
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// Run core init handlers (core 0 only, before cache/MMU is configured).
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// Secondary cores are not started yet at this point, so there is no
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// per-CPU CORE-stage event.
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do_system_init_event(ESP_SYS_EVENT_SYSTEM_INIT_CORE);
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}
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static void do_secondary_init(void)
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{
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#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
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// The port layer transferred control to this function with other cores 'paused',
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// resume execution so that cores might execute component initialization functions.
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startup_resume_other_cores();
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#endif
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// Run secondary init handlers for core 0. While this is happening, all
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// other cores are executing the same priority-ordered secondary list and
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// skipping handlers whose core mask does not include them.
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do_system_init_event(ESP_SYS_EVENT_SYSTEM_INIT_SECONDARY);
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#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
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// Wait for all cores to finish secondary init.
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volatile bool system_inited = false;
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while (!system_inited) {
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system_inited = true;
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for (int i = 0; i < SOC_CPU_CORES_NUM; i++) {
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system_inited &= s_system_inited[i];
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}
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esp_rom_delay_us(100);
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}
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#endif
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}
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static void start_cpu0_default(void)
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{
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// Initialize core components and services.
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// Operations that needs the cache to be disabled have to be done here.
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do_core_init();
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#if !CONFIG_IDF_TARGET_LINUX
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// Execute constructors.
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#if CONFIG_COMPILER_CXX_EXCEPTIONS
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__do_global_ctors_1();
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#endif
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extern void __libc_init_array(void);
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__libc_init_array();
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#endif // !CONFIG_IDF_TARGET_LINUX
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/* ----------------------------------Separator-----------------------------
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* After this stage, other CPU start running with the cache, however the scheduler (and ipc service) is not available.
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* Don't touch the cache/MMU until the OS is up.
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*/
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// Execute init functions of other components; blocks
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// until all cores finish (when !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE).
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do_secondary_init();
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#if SOC_CPU_CORES_NUM > 1 && !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
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s_system_full_inited = true;
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#endif
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esp_startup_start_app();
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ESP_INFINITE_LOOP();
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}
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#if CONFIG_IDF_TARGET_LINUX && !defined(ESP_SYSTEM_LINUX_NO_MAIN)
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__attribute__((weak)) int main(int argc, char **argv)
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{
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start_cpu0();
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return 0;
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}
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#endif // CONFIG_IDF_TARGET_LINUX
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