chore: import upstream snapshot with attribution
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/*
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* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "hal/adc_types.h"
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#include "esp_err.h"
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#include "esp_adc/adc_oneshot.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct {
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adc_unit_t adc_n; // ADC Unit
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adc_channel_t channel; // ADC channel
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adc_atten_t atten; // ADC channel attenuation
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adc_bitwidth_t width; // ADC bit width, only used for ADC unit 1
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adc_ulp_mode_t ulp_mode; // ADC ULP Mode
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} ulp_adc_cfg_t; // ULP FSM ADC configuration parameters
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/**
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* @brief ULP ADC channel configuration parameters
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*/
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typedef adc_oneshot_chan_cfg_t ulp_adc_chan_cfg_t;
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/**
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* @brief Initialize and calibrate the ADC for use by ULP FSM
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*
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* @note Initializes the ADC unit for ULP use and configures the channel
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* specified in cfg->channel. To monitor multiple channels, call
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* ulp_adc_config_channel() afterwards to configure additional channels.
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*
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* @param cfg Configuration parameters
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* @return esp_err_t ESP_OK for successful.
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*/
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esp_err_t ulp_adc_init(const ulp_adc_cfg_t *cfg);
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/**
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* @brief Configure and calibrate an additional ADC channel for use by ULP
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*
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* Configures a channel on an ADC unit that has already been initialized by
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* ulp_adc_init(). This can be called multiple times to configure multiple
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* channels on the same ADC unit.
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*
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* @note HW calibration parameters are stored per attenuation, but only one set
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* is active in the ADC unit at a time. If channels use different
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* attenuations, readings on channels whose attenuation differs from the
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* last configured one may be less accurate.
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*
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* @param adc_n ADC unit (must already be initialized via ulp_adc_init())
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* @param channel ADC channel to configure
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* @param chan_cfg Channel configuration (attenuation and bit width)
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* @return esp_err_t ESP_OK for successful.
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*/
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esp_err_t ulp_adc_config_channel(adc_unit_t adc_n, adc_channel_t channel, const ulp_adc_chan_cfg_t *chan_cfg);
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/**
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* @brief Deinitialize ADC after use with ULP, allowing it to be reclaimed
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*
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* @return esp_err_t ESP_OK for successful.
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*/
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esp_err_t ulp_adc_deinit(void);
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#ifdef __cplusplus
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}
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#endif
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@@ -0,0 +1,67 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __ULP_COMMON_H__
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#define __ULP_COMMON_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include "esp_err.h"
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#include "ulp_common_defs.h"
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/**
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* @brief Set one of ULP wakeup period values
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*
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* ULP coprocessor starts running the program when the wakeup timer counts up
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* to a given value (called period). There are 5 period values which can be
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* programmed into SENS_ULP_CP_SLEEP_CYCx_REG registers, x = 0..4 for ESP32, and
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* one period value which can be programmed into RTC_CNTL_ULP_CP_TIMER_1_REG register for ESP32-S2/S3.
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* By default, for ESP32, wakeup timer will use the period set into SENS_ULP_CP_SLEEP_CYC0_REG,
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* i.e. period number 0. ULP program code can use SLEEP instruction to select
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* which of the SENS_ULP_CP_SLEEP_CYCx_REG should be used for subsequent wakeups.
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*
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* However, please note that SLEEP instruction issued (from ULP program) while the system
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* is in deep sleep mode does not have effect, and sleep cycle count 0 is used.
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*
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* For ESP32-S2/S3 the SLEEP instruction not exist. Instead a WAKE instruction will be used.
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*
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* @param period_index wakeup period setting number (0 - 4)
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* @param period_us wakeup period, us
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* @note The ULP FSM requires two clock cycles to wakeup before being able to run the program.
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* Then additional 16 cycles are reserved after wakeup waiting until the 8M clock is stable.
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* The FSM also requires two more clock cycles to go to sleep after the program execution is halted.
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* The minimum wakeup period that may be set up for the ULP
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* is equal to the total number of cycles spent on the above internal tasks.
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* For a default configuration of the ULP running at 150kHz it makes about 133us.
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* @return
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* - ESP_OK on success
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* - ESP_ERR_INVALID_ARG if period_index is out of range
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*/
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esp_err_t ulp_set_wakeup_period(size_t period_index, uint32_t period_us);
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/**
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* @brief Stop the ULP timer
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*
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* @note This will stop the ULP from waking up if halted, but will not abort any program
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* currently executing on the ULP.
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*/
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void ulp_timer_stop(void);
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/**
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* @brief Resume the ULP timer
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*
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* @note This will resume an already configured timer, but does no other configuration
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*
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*/
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void ulp_timer_resume(void);
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#ifdef __cplusplus
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}
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#endif
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#endif // __ULP_COMMON_H__
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@@ -0,0 +1,21 @@
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/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __ULP_COMMON_DEFS_H__
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#define __ULP_COMMON_DEFS_H__
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#include "soc/soc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define RTC_SLOW_MEM ((uint32_t*) SOC_RTC_DATA_LOW)
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#ifdef __cplusplus
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}
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#endif
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#endif // __ULP_COMMON_DEFS_H__
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