wehub-resource-sync
172 lines
8.8 KiB
Plaintext
172 lines
8.8 KiB
Plaintext
/* ******************************************************************************
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*
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*
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* This program and the accompanying materials are made available under the
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* terms of the Apache License, Version 2.0 which is available at
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* https://www.apache.org/licenses/LICENSE-2.0.
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*
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* See the NOTICE file distributed with this work for additional
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* information regarding copyright ownership.
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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* SPDX-License-Identifier: Apache-2.0
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******************************************************************************/
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//
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// @author Yurii Shyrma (iuriish@yahoo.com)
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//
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#include <ops/declarable/helpers/convolutions.h>
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#include "cudnnUtils.h"
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namespace sd {
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namespace ops {
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namespace platforms {
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//////////////////////////////////////////////////////////////////////////
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PLATFORM_IMPL(maxpool3dnew, ENGINE_CUDA) {
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auto input = INPUT_VARIABLE(0); // [bS, iD, iH, iW, iC] (NDHWC) or [bS, iC, iD, iH, iW] (NCDHW)
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auto output = OUTPUT_VARIABLE(0); // [bS, oD, oH, oW, iC] (NDHWC) or [bS, iC, oD, oH, oW] (NCDHW)
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LongType kD = INT_ARG(0); // filter(kernel) depth
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LongType kH = INT_ARG(1); // filter(kernel) height
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LongType kW = INT_ARG(2); // filter(kernel) width
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LongType sD = INT_ARG(3); // strides depth
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LongType sH = INT_ARG(4); // strides height
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LongType sW = INT_ARG(5); // strides width
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LongType pD = INT_ARG(6); // paddings depth
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LongType pH = INT_ARG(7); // paddings height
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LongType pW = INT_ARG(8); // paddings width
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LongType dD = INT_ARG(9); // dilations depth
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LongType dH = INT_ARG(10); // dilations height
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LongType dW = INT_ARG(11); // dilations width
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int paddingMode = INT_ARG(12); // 1-SAME, 0-VALID
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// int extraParam0 = INT_ARG(13);
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int isNCDHW = block.getIArguments()->size() > 14 ? !INT_ARG(14) : 1; // 0-NCDHW, 1-NDHWC
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REQUIRE_TRUE(input->rankOf() == 5, 0,
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"MAXPOOL3DNEW CUDNN OP: rank of input array must be equal to 5, but got %i instead !", input->rankOf());
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REQUIRE_TRUE(dD != 0 && dH != 0 && dW != 0, 0,
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"MAXPOOL3DNEW CUDNN OP: dilation must not be zero, but got instead {%i, %i, %i}", dD, dH, dW);
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LongType bS, iC, iD, iH, iW, oC, oD, oH,
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oW; // batch size, input channels, input depth/height/width, output channels, output depth/height/width;
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LongType indIOioC, indIOioD, indWoC, indWiC, indWkD; // corresponding indexes
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ConvolutionUtils::getSizesAndIndexesConv3d(isNCDHW, 0, *input, *output, bS, iC, iD, iH, iW, oC, oD, oH, oW, indIOioC,
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indIOioD, indWiC, indWoC, indWkD);
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std::vector<LongType> expectedOutputShape =
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ShapeUtils::composeShapeUsingDimsAndIdx({bS, iC, oD, oH, oW, 0, indIOioC, indIOioD, indIOioD + 1, indIOioD + 2});
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REQUIRE_TRUE(output->isSameShape(expectedOutputShape), 0,
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"MAXPOOL3DNEW CUDNN OP: wrong shape of output array, expected is %s, but got %s instead !",
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ShapeUtils::shapeAsString(expectedOutputShape).c_str(), ShapeUtils::shapeAsString(output).c_str());
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if (paddingMode) // SAME
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ConvolutionUtils::calcPadding3D(pD, pH, pW, oD, oH, oW, iD, iH, iW, kD, kH, kW, sD, sH, sW, dD, dH, dW);
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pooling3dCUDNN(block.launchContext(), input, output, kD, kH, kW, sD, sH, sW, pD, pH, pW, dD, dH, dW, isNCDHW,
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CUDNN_POOLING_MAX);
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return Status::OK;
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}
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//////////////////////////////////////////////////////////////////////////
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PLATFORM_CHECK(maxpool3dnew, ENGINE_CUDA) {
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auto input = INPUT_VARIABLE(0);
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auto output = OUTPUT_VARIABLE(0);
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Requirements req("CUDNN MAXPOOL3d OP");
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req.expectEq(makeInfoVariable(input->dataType(), TYPE_MSG_INPUT),
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makeInfoVariable(output->dataType(), TYPE_MSG_OUTPUT)) &&
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req.expectIn(makeInfoVariable(input->dataType(), TYPE_MSG_INPUT),
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{INT32, HALF, FLOAT32, DOUBLE});
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req.logTheSuccess();
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return req;
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}
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//////////////////////////////////////////////////////////////////////////
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PLATFORM_IMPL(maxpool3dnew_bp, ENGINE_CUDA) {
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auto input = INPUT_VARIABLE(0); // [bS, iD, iH, iW, iC] (NDHWC) or [bS, iC, iD, iH, iW] (NCDHW)
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auto gradO = INPUT_VARIABLE(1); // [bS, oD, oH, oW, oC] (NDHWC) or [bS, oC, oD, oH, oW] (NCDHW), epsilon_next
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auto gradI = OUTPUT_VARIABLE(0); // [bS, iD, iH, iW, iC] (NDHWC) or [bS, iC, iD, iH, iW] (NCDHW), epsilon
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const LongType kD = INT_ARG(0); // filter(kernel) depth
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const LongType kH = INT_ARG(1); // filter(kernel) height
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const LongType kW = INT_ARG(2); // filter(kernel) width
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const LongType sD = INT_ARG(3); // strides depth
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const LongType sH = INT_ARG(4); // strides height
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const LongType sW = INT_ARG(5); // strides width
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LongType pD = INT_ARG(6); // paddings depth
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LongType pH = INT_ARG(7); // paddings height
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LongType pW = INT_ARG(8); // paddings width
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const LongType dD = INT_ARG(9); // dilations depth
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const LongType dH = INT_ARG(10); // dilations height
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const LongType dW = INT_ARG(11); // dilations width
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const int isSameMode = INT_ARG(12); // 1-SAME, 0-VALID
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// const int extraParam0 = INT_ARG(13); // define what divisor to use while
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// averaging
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const int isNCDHW = block.getIArguments()->size() > 14 ? !INT_ARG(14) : 1; // 0-NCDHW, 1-NDHWC
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REQUIRE_TRUE(input->rankOf() == 5, 0, "MAXPOOL3DNEW_BP CUDNN OP: input should have rank of 5, but got %i instead",
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input->rankOf());
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REQUIRE_TRUE(dD != 0 && dH != 0 && dW != 0, 0,
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"MAXPOOL3DNEW_BP CUDNN OP: dilation must not be zero, but got instead {%i, %i, %i}", dD, dH, dW);
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LongType bS, iC, iD, iH, iW, oC, oD, oH,
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oW; // batch size, input channels, input depth/height/width, output channels, output depth/height/width;
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LongType indIOioC, indIOioD, indWoC, indWiC, indWkD; // corresponding indexes
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ConvolutionUtils::getSizesAndIndexesConv3d(isNCDHW, 0, *input, *gradO, bS, iC, iD, iH, iW, oC, oD, oH, oW, indIOioC,
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indIOioD, indWiC, indWoC, indWkD);
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std::vector<LongType> expectedGradOShape =
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ShapeUtils::composeShapeUsingDimsAndIdx({bS, iC, oD, oH, oW, 0, indIOioC, indIOioD, indIOioD + 1, indIOioD + 2});
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std::vector<LongType> expectedGradIShape =
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ShapeUtils::composeShapeUsingDimsAndIdx({bS, iC, iD, iH, iW, 0, indIOioC, indIOioD, indIOioD + 1, indIOioD + 2});
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REQUIRE_TRUE(gradO->isSameShape(expectedGradOShape), 0,
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"MAXPOOL3DNEW_BP CUDNN: wrong shape of output's gradients array (next epsilon), expected is %s, but got "
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"%s instead !",
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ShapeUtils::shapeAsString(expectedGradOShape).c_str(), ShapeUtils::shapeAsString(gradO).c_str());
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REQUIRE_TRUE(
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gradI->isSameShape(expectedGradIShape), 0,
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"MAXPOOL3DNEW_BP CUDNN: wrong shape of input's gradients array (epsilon), expected is %s, but got %s instead !",
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ShapeUtils::shapeAsString(expectedGradIShape).c_str(), ShapeUtils::shapeAsString(gradI).c_str());
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if (isSameMode) // SAME
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ConvolutionUtils::calcPadding3D(pD, pH, pW, oD, oH, oW, iD, iH, iW, kD, kH, kW, sD, sH, sW, dD, dH, dW);
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pooling3dBpCUDNN(block.launchContext(), input, gradO, gradI, kD, kH, kW, sD, sH, sW, pD, pH, pW, dD, dH, dW, isNCDHW,
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CUDNN_POOLING_MAX);
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return Status::OK;
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}
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PLATFORM_CHECK(maxpool3dnew_bp, ENGINE_CUDA) {
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auto input = INPUT_VARIABLE(0); // [bS, iD, iH, iW, iC] (NDHWC) or [bS, iC, iD, iH, iW] (NCDHW)
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auto gradO = INPUT_VARIABLE(1); // [bS, oD, oH, oW, oC] (NDHWC) or [bS, oC, oD, oH, oW] (NCDHW), epsilon_next
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auto gradI = OUTPUT_VARIABLE(0); // [bS, iD, iH, iW, iC] (NDHWC) or [bS, iC, iD, iH, iW] (NCDHW), epsilon
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Requirements req("CUDNN MAXPOOL3d_BP OP");
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req.expectEq(makeInfoVariable(input->dataType(), TYPE_MSG_INPUT0),
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makeInfoVariable(gradO->dataType(), TYPE_MSG_INPUT1)) &&
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req.expectEq(makeInfoVariable(input->dataType(), TYPE_MSG_INPUT),
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makeInfoVariable(gradI->dataType(), TYPE_MSG_OUTPUT)) &&
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req.expectIn(makeInfoVariable(input->dataType(), TYPE_MSG_INPUT),
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{INT32, HALF, FLOAT32, DOUBLE}) &&
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req.expect(
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makeShapeInfoVariable(input, SHAPE_MSG_INPUT0), makeShapeInfoVariable(gradI, SHAPE_MSG_OUTPUT),
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[](const decltype(input)& l, const decltype(gradI)& r) {
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return shape::haveSameShapeAndStrides(l->shapeInfo(), r->shapeInfo());
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},
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EXPECTED_EQ_MSG);
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req.logTheSuccess();
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return req;
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}
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} // namespace platforms
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} // namespace ops
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} // namespace sd
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