wehub-resource-sync
108 lines
3.8 KiB
Python
108 lines
3.8 KiB
Python
# Licensed to the Apache Software Foundation (ASF) under one
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# or more contributor license agreements. See the NOTICE file
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# distributed with this work for additional information
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# regarding copyright ownership. The ASF licenses this file
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# to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance
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# with the License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing,
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# software distributed under the License is distributed on an
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# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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# KIND, either express or implied. See the License for the
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# specific language governing permissions and limitations
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# under the License.
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# pylint: disable=missing-function-docstring,missing-module-docstring
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# ruff: noqa: F401
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import pytest
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import tvm
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import tvm.testing
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from tvm import tirx
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from tvm.s_tir.schedule.testing import (
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assert_structural_equal_ignore_global_symbol,
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verify_trace_roundtrip,
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)
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from tvm.script import tirx as T
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@T.prim_func(s_tir=True)
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def indirect_mem_access(a: T.handle, idx_a: T.handle, b: T.handle, idx_b: T.handle) -> None:
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A = T.match_buffer(a, [128], dtype="float32")
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IA = T.match_buffer(idx_a, [10], dtype="int32")
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B = T.match_buffer(b, [128], dtype="float32")
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IB = T.match_buffer(idx_b, [10], dtype="int32")
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for i in range(10):
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with T.sblock("B"):
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vi = T.axis.spatial(10, i)
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T.reads(A[IA[vi]], IA[vi])
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T.writes(B[IB[vi]], IB[vi])
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B[IB[vi]] = A[IA[vi]]
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@T.prim_func(s_tir=True)
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def indirect_mem_access_hide_ia(a: T.handle, idx_a: T.handle, b: T.handle, idx_b: T.handle) -> None:
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A = T.match_buffer(a, [128], dtype="float32")
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IA = T.match_buffer(idx_a, [10], dtype="int32")
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B = T.match_buffer(b, [128], dtype="float32")
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IB = T.match_buffer(idx_b, [10], dtype="int32")
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for i in range(10):
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with T.sblock("B"):
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vi = T.axis.spatial(10, i)
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T.reads(A[IA[vi]])
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T.writes(B[IB[vi]], IB[vi])
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B[IB[vi]] = A[IA[vi]]
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@T.prim_func(s_tir=True)
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def indirect_mem_access_hide_ib(a: T.handle, idx_a: T.handle, b: T.handle, idx_b: T.handle) -> None:
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A = T.match_buffer(a, [128], dtype="float32")
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IA = T.match_buffer(idx_a, [10], dtype="int32")
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B = T.match_buffer(b, [128], dtype="float32")
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IB = T.match_buffer(idx_b, [10], dtype="int32")
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for i in range(10):
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with T.sblock("B"):
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vi = T.axis.spatial(10, i)
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T.reads(A[IA[vi]], IA[vi])
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T.writes(B[IB[vi]])
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B[IB[vi]] = A[IA[vi]]
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def test_hide_buffer_access_read():
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sch = tvm.s_tir.Schedule(indirect_mem_access, debug_mask="all")
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block_b = sch.get_sblock("B")
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sch.unsafe_hide_buffer_access(block_b, "read", [1])
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assert_structural_equal_ignore_global_symbol(indirect_mem_access_hide_ia, sch.mod["main"])
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verify_trace_roundtrip(sch=sch, mod=indirect_mem_access)
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def test_hide_buffer_access_write():
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sch = tvm.s_tir.Schedule(indirect_mem_access, debug_mask="all")
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block_b = sch.get_sblock("B")
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sch.unsafe_hide_buffer_access(block_b, "write", [1])
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assert_structural_equal_ignore_global_symbol(indirect_mem_access_hide_ib, sch.mod["main"])
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verify_trace_roundtrip(sch=sch, mod=indirect_mem_access)
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def test_hide_buffer_access_fail_buffer_type():
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sch = tvm.s_tir.Schedule(indirect_mem_access, debug_mask="all")
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block_b = sch.get_sblock("B")
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with pytest.raises(RuntimeError):
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sch.unsafe_hide_buffer_access(block_b, "opaque", [0])
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def test_hide_buffer_access_fail_buffer_index():
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sch = tvm.s_tir.Schedule(indirect_mem_access, debug_mask="all")
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block_b = sch.get_sblock("B")
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with pytest.raises(RuntimeError):
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sch.unsafe_hide_buffer_access(block_b, "read", [2])
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if __name__ == "__main__":
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tvm.testing.main()
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