wehub-resource-sync
66 lines
3.1 KiB
Python
66 lines
3.1 KiB
Python
# Licensed to the Apache Software Foundation (ASF) under one
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# or more contributor license agreements. See the NOTICE file
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# distributed with this work for additional information
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# regarding copyright ownership. The ASF licenses this file
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# to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance
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# with the License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing,
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# software distributed under the License is distributed on an
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# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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# KIND, either express or implied. See the License for the
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# specific language governing permissions and limitations
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# under the License.
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# ruff: noqa: E501, F401
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import pytest
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import tvm
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from tvm.target import Target, _ffi_api, codegen
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from tvm.target.codegen import llvm_get_vector_width, target_has_features
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LLVM_VERSION = codegen.llvm_version_major()
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# fmt: off
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@pytest.mark.parametrize(
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"min_llvm_version,tvm_target,vec_width",
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[
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# generic, no vector -> (default 128)
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(-1, {"kind": "llvm", "device": "riscv_cpu", "mtriple": "riscv64-linux-gnu", "mcpu": "generic-rv64", "mattr": ["+i", "+m"]}, 128),
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(-1, {"kind": "llvm", "device": "riscv_cpu", "mtriple": "riscv32-linux-gnu", "mcpu": "generic-rv32", "mattr": ["+64bit", "+a", "+c", "+d", "+f", "+m"]}, 128),
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# generic, with vector -> (default zvl128b)
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(-1, {"kind": "llvm", "device": "riscv_cpu", "mtriple": "riscv32-linux-gnu", "mcpu": "generic-rv32", "mattr": ["+i", "+m", "+v"]}, 128),
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(-1, {"kind": "llvm", "device": "riscv_cpu", "mtriple": "riscv64-linux-gnu", "mcpu": "generic-rv64", "mattr": ["+64bit", "+a", "+c", "+d", "+f", "+m", "+v"]}, 128),
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# explicit +zvlXXXb
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(14, {"kind": "llvm", "device": "riscv_cpu", "mtriple": "riscv32-linux-gnu", "mcpu": "generic-rv32", "mattr": ["+i", "+m", "+v", "+zvl64b"]}, 128),
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(14, {"kind": "llvm", "device": "riscv_cpu", "mtriple": "riscv64-linux-gnu", "mcpu": "generic-rv64", "mattr": ["+64bit", "+a", "+c", "+d", "+f", "+m", "+v", "+zvl256b"]}, 256),
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(14, {"kind": "llvm", "device": "riscv_cpu", "mtriple": "riscv64-linux-gnu", "mcpu": "generic-rv64", "mattr": ["+64bit", "+a", "+c", "+d", "+f", "+m", "+v", "+zvl512b"]}, 512),
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# vendor CPU
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(17, {"kind": "llvm", "device": "riscv_cpu", "mtriple": "riscv64-linux-gnu", "mcpu": "sifive-x280"}, 512),
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(18, {"kind": "llvm", "device": "riscv_cpu", "mtriple": "riscv64-linux-gnu", "mcpu": "sifive-p670"}, 128),
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(19, {"kind": "llvm", "device": "riscv_cpu", "mtriple": "riscv64-linux-gnu", "mcpu": "spacemit-x60"}, 256),
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],
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)
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def test_riscv_rvv_features(min_llvm_version, tvm_target, vec_width):
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"""Test RVV features support for different targets.
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Parameters
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----------
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min_llvm_version : int
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Minimal LLVM version.
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tvm_target : str
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TVM target.
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vec_width : bool
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Expected vector width.
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"""
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# skip test on llvm_version
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if LLVM_VERSION < min_llvm_version:
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return
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with Target(tvm_target):
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assert llvm_get_vector_width() == vec_width
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