397 lines
14 KiB
Plaintext
397 lines
14 KiB
Plaintext
/*
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* Copyright (c) 2022-2024, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <cuda_bf16.h>
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#include <cuda_fp16.h>
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#include <dlpack/dlpack.h>
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#include <stdint.h>
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#include <tvm/runtime/logging.h>
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#include "custom_allreduce_kernels.h"
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namespace tensorrt_llm {
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static inline __device__ void st_flag_release(uint32_t& flag, uint32_t* flag_addr) {
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#if __CUDA_ARCH__ >= 700
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asm volatile("st.global.release.sys.b32 [%1], %0;" ::"r"(flag), "l"(flag_addr));
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#else
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__threadfence_system();
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asm volatile("st.global.volatile.b32 [%1], %0;" ::"r"(flag), "l"(flag_addr));
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#endif
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}
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////////////////////////////////////////////////////////////////////////////////////////////////////
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static inline __device__ void ld_flag_acquire(uint32_t& flag, uint32_t* flag_addr) {
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#if __CUDA_ARCH__ >= 700
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asm volatile("ld.global.acquire.sys.b32 %0, [%1];" : "=r"(flag) : "l"(flag_addr));
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#else
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asm volatile("ld.global.volatile.b32 %0, [%1];" : "=r"(flag) : "l"(flag_addr));
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#endif
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}
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////////////////////////////////////////////////////////////////////////////////////////////////////
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// Type Converter that packs data format to 128 bits data type
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//
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using PackedFloat = union {
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int4 packed;
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float unpacked[4];
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};
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using PackedHalf = union {
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int4 packed;
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half2 unpacked[4];
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};
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template <typename T>
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struct PackedOn16Bytes {};
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template <>
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struct PackedOn16Bytes<float> {
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using Type = PackedFloat;
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};
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template <>
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struct PackedOn16Bytes<half> {
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using Type = PackedHalf;
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};
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using PackedBFloat16 = union {
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int4 packed;
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__nv_bfloat162 unpacked[4];
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};
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template <>
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struct PackedOn16Bytes<__nv_bfloat16> {
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using Type = PackedBFloat16;
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};
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// add two 128b data
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template <typename T>
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inline __device__ int4 add128b(T& a, T& b) {
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T c;
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c.unpacked[0] = a.unpacked[0] + b.unpacked[0];
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c.unpacked[1] = a.unpacked[1] + b.unpacked[1];
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c.unpacked[2] = a.unpacked[2] + b.unpacked[2];
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c.unpacked[3] = a.unpacked[3] + b.unpacked[3];
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return c.packed;
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}
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__inline__ __device__ void multi_gpu_barrier(uint32_t** signals, const uint32_t flag,
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const size_t rank, const size_t world_size,
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int const tidx, int const bidx) {
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// At the end of the function, we now that has least block 0 from all others GPUs have reached
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// that point.
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uint32_t volatile* my_signals = signals[rank];
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if (tidx < world_size) {
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// The 1st block notifies the other ranks.
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if (bidx == 0) {
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signals[tidx][rank] = flag;
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}
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// Busy-wait until all ranks are ready.
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while (my_signals[tidx] != flag) {
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}
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}
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// Make sure we can move on...
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__syncthreads();
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}
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__global__ void multiGpuBarrierKernel(AllReduceParams params) {
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multi_gpu_barrier(params.peer_barrier_ptrs_out, params.barrier_flag, params.local_rank,
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params.ranks_per_node, threadIdx.x, blockIdx.x);
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}
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template <typename T, int RANKS_PER_NODE>
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static __global__ void oneShotAllReduceKernel(AllReduceParams params) {
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int const bidx = blockIdx.x;
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int const tidx = threadIdx.x;
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// The number of elements packed into one for comms
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static constexpr int NUM_ELTS = 16 / sizeof(T);
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// Packed data type for comms
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using PackedStruct = typename PackedOn16Bytes<T>::Type;
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multi_gpu_barrier(params.peer_barrier_ptrs_in, params.barrier_flag, params.local_rank,
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RANKS_PER_NODE, tidx, bidx);
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// The source pointers. Distributed round-robin for the different warps.
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T const* src_d[RANKS_PER_NODE];
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#pragma unroll
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for (int ii = 0; ii < RANKS_PER_NODE; ++ii) {
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int rank = (params.local_rank + ii) % RANKS_PER_NODE;
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src_d[ii] = reinterpret_cast<T*>(params.peer_comm_buffer_ptrs[rank]);
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}
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// The location in the destination array (load 8 fp16 or load 4 fp32 using LDG.128).
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size_t offset = bidx * params.elts_per_block + tidx * NUM_ELTS;
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// The end of the segment computed by that block.
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size_t max_offset = min((bidx + 1) * params.elts_per_block, params.elts_per_rank);
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// Each block accumulates the values from the different GPUs on the same node.
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for (size_t iter_offset = offset; iter_offset < max_offset;
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iter_offset += blockDim.x * NUM_ELTS) {
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// Iterate over the different ranks/devices on the node to load the values.
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PackedStruct vals[RANKS_PER_NODE];
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#pragma unroll
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for (int ii = 0; ii < RANKS_PER_NODE; ++ii) {
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vals[ii].packed = *reinterpret_cast<int4 const*>(&src_d[ii][iter_offset]);
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}
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// Sum the values from the different ranks.
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PackedStruct sums;
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sums.packed = {0, 0, 0, 0};
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#pragma unroll
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for (int ii = 0; ii < RANKS_PER_NODE; ++ii) {
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sums.packed = add128b(sums, vals[ii]);
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}
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// Store to the destination buffer.
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*reinterpret_cast<int4*>(&reinterpret_cast<T*>(params.local_output_buffer_ptr)[iter_offset]) =
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sums.packed;
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}
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}
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template <typename T, int RANKS_PER_NODE>
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static __global__ void twoShotAllReduceKernel(AllReduceParams params) {
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// The block index.
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int const bidx = blockIdx.x;
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// The thread index with the block.
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int const tidx = threadIdx.x;
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// The number of elements packed into one for comms
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static constexpr int NUM_ELTS = 16 / sizeof(T);
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// Packed data type for comms
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using PackedType = typename PackedOn16Bytes<T>::Type;
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// The location in the destination array (load 8 fp16 or load 4 fp32 using LDG.128).
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const size_t block_offset = bidx * params.elts_per_block + tidx * NUM_ELTS;
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const size_t block_start = params.rank_offset + block_offset;
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// The end of the segment computed by that block.
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size_t max_offset =
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min(block_start + params.elts_per_block, params.rank_offset + params.elts_per_rank);
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multi_gpu_barrier(params.peer_barrier_ptrs_in, params.barrier_flag, params.local_rank,
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RANKS_PER_NODE, tidx, bidx);
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// The source pointers. Distributed round-robin for the different warps.
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T* src_d[RANKS_PER_NODE];
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// The destination ranks for round-robin gathering
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size_t dst_rank[RANKS_PER_NODE];
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#pragma unroll
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for (int ii = 0; ii < RANKS_PER_NODE; ++ii) {
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int rank = (params.local_rank + ii) % RANKS_PER_NODE;
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src_d[ii] = reinterpret_cast<T*>(params.peer_comm_buffer_ptrs[rank]);
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dst_rank[ii] = rank;
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}
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// Each block accumulates the values from the different GPUs on the same node.
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for (size_t local_offset = block_start; local_offset < max_offset;
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local_offset += blockDim.x * NUM_ELTS) {
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// Iterate over the different ranks/devices on the node to load the values.
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PackedType vals[RANKS_PER_NODE];
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#pragma unroll
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for (int ii = 0; ii < RANKS_PER_NODE; ++ii) {
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vals[ii].packed = *reinterpret_cast<int4 const*>(&src_d[ii][local_offset]);
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}
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// Sum the values from the different ranks.
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PackedType sums;
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sums.packed = {0, 0, 0, 0};
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#pragma unroll
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for (int ii = 0; ii < RANKS_PER_NODE; ++ii) {
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sums.packed = add128b(sums, vals[ii]);
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}
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// Store to the local buffer.
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*reinterpret_cast<int4*>(&src_d[0][local_offset]) = sums.packed;
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}
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// sync threads to make sure all block threads have the sums
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__syncthreads();
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// barriers among the blocks with the same idx (release-acquire semantics)
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if (tidx < RANKS_PER_NODE) {
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// The all blocks notifies the other ranks.
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uint32_t flag_block_offset = RANKS_PER_NODE + bidx * RANKS_PER_NODE;
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st_flag_release(params.barrier_flag,
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params.peer_barrier_ptrs_in[tidx] + flag_block_offset + params.local_rank);
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// Busy-wait until all ranks are ready.
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uint32_t rank_barrier = 0;
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uint32_t* peer_barrier_d =
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params.peer_barrier_ptrs_in[params.local_rank] + flag_block_offset + tidx;
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do {
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ld_flag_acquire(rank_barrier, peer_barrier_d);
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} while (rank_barrier != params.barrier_flag);
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}
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// sync threads to make sure all other ranks has the final partial results
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__syncthreads();
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size_t max_block_offset = min(block_offset + params.elts_per_block, params.elts_per_rank);
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// Gather all needed elts from other intra-node ranks
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for (size_t local_offset = block_offset; local_offset < max_block_offset;
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local_offset += blockDim.x * NUM_ELTS) {
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#pragma unroll
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for (int ii = 0; ii < RANKS_PER_NODE; ++ii) {
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// use round-robin gathering from other ranks
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size_t offset_rank = dst_rank[ii] * params.elts_per_rank + local_offset;
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if (offset_rank >= params.elts_total) {
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continue;
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}
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*reinterpret_cast<int4*>(&reinterpret_cast<T*>(params.local_output_buffer_ptr)[offset_rank]) =
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*reinterpret_cast<int4*>(&src_d[ii][offset_rank]);
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}
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}
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}
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////////////////////////////////////////////////////////////////////////////////////////////////////
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inline int divUp(int a, int b) { return (a + b - 1) / b; }
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std::tuple<int, int> kernelLaunchConfig(AllReduceStrategyType algo, AllReduceParams& param,
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size_t elts_per_thread) {
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TVM_FFI_ICHECK(param.elts_total % elts_per_thread == 0);
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int blocks_per_grid = 1, threads_per_block = DEFAULT_BLOCK_SIZE;
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const size_t total_threads = param.elts_total / elts_per_thread;
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switch (algo) {
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case AllReduceStrategyType::ONESHOT: { // one stage all reduce algo
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if (total_threads <= DEFAULT_BLOCK_SIZE) { // local reduce
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threads_per_block = WARP_SIZE * divUp(total_threads, WARP_SIZE);
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blocks_per_grid = 1;
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} else { // local reduce
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threads_per_block = DEFAULT_BLOCK_SIZE;
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blocks_per_grid = divUp(total_threads, DEFAULT_BLOCK_SIZE);
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blocks_per_grid = std::min(static_cast<int>(MAX_ALL_REDUCE_BLOCKS), blocks_per_grid);
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}
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param.elts_per_rank = param.elts_total;
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param.elts_per_block =
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elts_per_thread * divUp(param.elts_per_rank, elts_per_thread * blocks_per_grid);
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break;
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}
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case AllReduceStrategyType::TWOSHOT: { // two stage all reduce algo
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const size_t elts_per_rank = param.elts_total / param.ranks_per_node;
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TVM_FFI_ICHECK(elts_per_rank % elts_per_thread == 0);
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size_t total_threads = elts_per_rank / elts_per_thread;
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total_threads = WARP_SIZE * ((total_threads + WARP_SIZE - 1) / WARP_SIZE);
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TVM_FFI_ICHECK(total_threads % WARP_SIZE == 0);
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while (total_threads % blocks_per_grid != 0 ||
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total_threads / blocks_per_grid > DEFAULT_BLOCK_SIZE) {
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blocks_per_grid += 1;
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}
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threads_per_block = total_threads / blocks_per_grid;
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// NOTE: need to adjust here
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if (static_cast<size_t>(blocks_per_grid) > MAX_ALL_REDUCE_BLOCKS) {
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size_t iter_factor = 1;
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while (blocks_per_grid / iter_factor > MAX_ALL_REDUCE_BLOCKS ||
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blocks_per_grid % iter_factor) {
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iter_factor += 1;
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}
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blocks_per_grid /= iter_factor;
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}
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param.elts_per_rank = param.elts_total / param.ranks_per_node;
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param.elts_per_block = param.elts_per_rank / blocks_per_grid;
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param.elts_per_block = elts_per_thread * divUp(param.elts_per_block, elts_per_thread);
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param.rank_offset = param.rank * param.elts_per_rank;
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break;
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}
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default:
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LOG(FATAL) << ("Algorithm not supported here.");
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}
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return std::make_tuple(blocks_per_grid, threads_per_block);
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}
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////////////////////////////////////////////////////////////////////////////////////////////////////
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template <typename T, int RANKS_PER_NODE>
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void dispatchARKernels(AllReduceStrategyType algo, AllReduceParams& param, int blocks_per_grid,
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int threads_per_block, cudaStream_t stream) {
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if (algo == AllReduceStrategyType::ONESHOT) {
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oneShotAllReduceKernel<T, RANKS_PER_NODE>
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<<<blocks_per_grid, threads_per_block, 0, stream>>>(param);
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} else {
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twoShotAllReduceKernel<T, RANKS_PER_NODE>
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<<<blocks_per_grid, threads_per_block, 0, stream>>>(param);
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}
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}
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template <typename T>
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void invokeOneOrTwoShotAllReduceKernel(AllReduceParams& param, AllReduceStrategyType strat,
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cudaStream_t stream) {
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TVM_FFI_ICHECK(strat == AllReduceStrategyType::ONESHOT || strat == AllReduceStrategyType::TWOSHOT);
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auto last_error = cudaGetLastError();
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if (last_error != cudaSuccess) {
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LOG(INFO) << "cuda error:" << cudaGetErrorString(last_error);
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}
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size_t elts_per_thread = 16 / sizeof(T);
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auto [blocks_per_grid, threads_per_block] = kernelLaunchConfig(strat, param, elts_per_thread);
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switch (param.ranks_per_node) {
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case 2:
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dispatchARKernels<T, 2>(strat, param, blocks_per_grid, threads_per_block, stream);
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break;
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case 4:
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dispatchARKernels<T, 4>(strat, param, blocks_per_grid, threads_per_block, stream);
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break;
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case 6:
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dispatchARKernels<T, 6>(strat, param, blocks_per_grid, threads_per_block, stream);
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break;
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case 8:
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dispatchARKernels<T, 8>(strat, param, blocks_per_grid, threads_per_block, stream);
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break;
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default:
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break;
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}
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last_error = cudaGetLastError();
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if (last_error != cudaSuccess) {
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LOG(INFO) << "cuda error:" << cudaGetErrorString(last_error);
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}
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}
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void invokeMultiGpuBarrier(AllReduceParams& param, cudaStream_t stream) {
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multiGpuBarrierKernel<<<1, param.ranks_per_node, 0, stream>>>(param);
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}
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void customAllReduce(AllReduceParams& params, void* data, size_t elts, DLDataType dataType,
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AllReduceStrategyType strat, cudaStream_t stream) {
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params.local_output_buffer_ptr = data;
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params.elts_total = elts;
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if (dataType.code == kDLFloat && dataType.bits == 32) {
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invokeOneOrTwoShotAllReduceKernel<float>(params, strat, stream);
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} else if (dataType.code == kDLFloat && dataType.bits == 16) {
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invokeOneOrTwoShotAllReduceKernel<half>(params, strat, stream);
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} else if (dataType.code == kDLBfloat && dataType.bits == 16) {
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invokeOneOrTwoShotAllReduceKernel<__nv_bfloat16>(params, strat, stream);
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} else {
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LOG(FATAL) << ("Unsupported dataType for customAllReduce");
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}
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}
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} // namespace tensorrt_llm
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