wehub-resource-sync
247 lines
9.0 KiB
C++
247 lines
9.0 KiB
C++
/*
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* Copyright (c) 2009-2015 by llvm/compiler-rt contributors
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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* \file builtin_fp16.h
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* \brief Functions for conversion between fp32 and fp16, adopted from compiler-rt.
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*/
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#ifndef COMPILER_RT_BUILTIN_FP16_H_
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#define COMPILER_RT_BUILTIN_FP16_H_
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#ifdef _MSC_VER
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#pragma warning(disable : 4305 4805)
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#endif
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#include <cstdint>
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static inline uint32_t __clz(uint32_t x) {
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// count leading zeros
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int n = 32;
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uint32_t y;
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y = x >> 16;
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if (y) {
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n = n - 16;
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x = y;
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}
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y = x >> 8;
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if (y) {
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n = n - 8;
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x = y;
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}
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y = x >> 4;
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if (y) {
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n = n - 4;
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x = y;
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}
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y = x >> 2;
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if (y) {
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n = n - 2;
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x = y;
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}
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y = x >> 1;
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if (y) return n - 2;
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return n - x;
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}
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template <typename SRC_T, typename SRC_REP_T, int SRC_SIG_BITS, typename DST_T, typename DST_REP_T,
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int DST_SIG_BITS>
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static inline DST_T __truncXfYf2__(SRC_T a) {
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// Various constants whose values follow from the type parameters.
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// Any reasonable optimizer will fold and propagate all of these.
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const int srcBits = sizeof(SRC_T) * 8;
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const int srcExpBits = srcBits - SRC_SIG_BITS - 1;
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const int srcInfExp = (1 << srcExpBits) - 1;
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const int srcExpBias = srcInfExp >> 1;
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const SRC_REP_T srcMinNormal = SRC_REP_T(1) << SRC_SIG_BITS;
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const SRC_REP_T srcSignificandMask = srcMinNormal - 1;
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const SRC_REP_T srcInfinity = (SRC_REP_T)srcInfExp << SRC_SIG_BITS;
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const SRC_REP_T srcSignMask = SRC_REP_T(1) << (SRC_SIG_BITS + srcExpBits);
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const SRC_REP_T srcAbsMask = srcSignMask - 1;
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const SRC_REP_T roundMask = (SRC_REP_T(1) << (SRC_SIG_BITS - DST_SIG_BITS)) - 1;
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const SRC_REP_T halfway = SRC_REP_T(1) << (SRC_SIG_BITS - DST_SIG_BITS - 1);
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const SRC_REP_T srcQNaN = SRC_REP_T(1) << (SRC_SIG_BITS - 1);
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const SRC_REP_T srcNaNCode = srcQNaN - 1;
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const int dstBits = sizeof(DST_T) * 8;
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const int dstExpBits = dstBits - DST_SIG_BITS - 1;
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const int dstInfExp = (1 << dstExpBits) - 1;
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const int dstExpBias = dstInfExp >> 1;
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const int underflowExponent = srcExpBias + 1 - dstExpBias;
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const int overflowExponent = srcExpBias + dstInfExp - dstExpBias;
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const SRC_REP_T underflow = (SRC_REP_T)underflowExponent << SRC_SIG_BITS;
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const SRC_REP_T overflow = (SRC_REP_T)overflowExponent << SRC_SIG_BITS;
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const DST_REP_T dstQNaN = DST_REP_T(1) << (DST_SIG_BITS - 1);
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const DST_REP_T dstNaNCode = dstQNaN - 1;
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// Break a into a sign and representation of the absolute value
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union SrcExchangeType {
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SRC_T f;
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SRC_REP_T i;
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};
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SrcExchangeType src_rep;
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src_rep.f = a;
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const SRC_REP_T aRep = src_rep.i;
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const SRC_REP_T aAbs = aRep & srcAbsMask;
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const SRC_REP_T sign = aRep & srcSignMask;
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DST_REP_T absResult;
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if (aAbs - underflow < aAbs - overflow) {
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// The exponent of a is within the range of normal numbers in the
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// destination format. We can convert by simply right-shifting with
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// rounding and adjusting the exponent.
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absResult = aAbs >> (SRC_SIG_BITS - DST_SIG_BITS);
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absResult -= (DST_REP_T)(srcExpBias - dstExpBias) << DST_SIG_BITS;
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const SRC_REP_T roundBits = aAbs & roundMask;
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// Round to nearest
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if (roundBits > halfway) absResult++;
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// Ties to even
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else if (roundBits == halfway)
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absResult += absResult & 1;
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} else if (aAbs > srcInfinity) {
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// a is NaN.
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// Conjure the result by beginning with infinity, setting the qNaN
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// bit and inserting the (truncated) trailing NaN field.
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absResult = (DST_REP_T)dstInfExp << DST_SIG_BITS;
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absResult |= dstQNaN;
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absResult |= ((aAbs & srcNaNCode) >> (SRC_SIG_BITS - DST_SIG_BITS)) & dstNaNCode;
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} else if (aAbs >= overflow) {
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// a overflows to infinity.
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absResult = (DST_REP_T)dstInfExp << DST_SIG_BITS;
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} else {
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// a underflows on conversion to the destination type or is an exact
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// zero. The result may be a denormal or zero. Extract the exponent
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// to get the shift amount for the denormalization.
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const int aExp = aAbs >> SRC_SIG_BITS;
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const int shift = srcExpBias - dstExpBias - aExp + 1;
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const SRC_REP_T significand = (aRep & srcSignificandMask) | srcMinNormal;
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// Right shift by the denormalization amount with sticky.
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if (shift > SRC_SIG_BITS) {
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absResult = 0;
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} else {
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const bool sticky = significand << (srcBits - shift);
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SRC_REP_T denormalizedSignificand = significand >> shift | sticky;
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absResult = denormalizedSignificand >> (SRC_SIG_BITS - DST_SIG_BITS);
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const SRC_REP_T roundBits = denormalizedSignificand & roundMask;
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// Round to nearest
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if (roundBits > halfway) absResult++;
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// Ties to even
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else if (roundBits == halfway)
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absResult += absResult & 1;
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}
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}
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// Apply the signbit to (DST_T)abs(a).
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const DST_REP_T result = absResult | sign >> (srcBits - dstBits);
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union DstExchangeType {
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DST_T f;
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DST_REP_T i;
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};
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DstExchangeType dst_rep;
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dst_rep.i = result;
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return dst_rep.f;
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}
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template <typename SRC_T, typename SRC_REP_T, int SRC_SIG_BITS, typename DST_T, typename DST_REP_T,
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int DST_SIG_BITS>
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static inline DST_T __extendXfYf2__(SRC_T a) {
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// Various constants whose values follow from the type parameters.
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// Any reasonable optimizer will fold and propagate all of these.
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const int srcBits = sizeof(SRC_T) * 8;
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const int srcExpBits = srcBits - SRC_SIG_BITS - 1;
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const int srcInfExp = (1 << srcExpBits) - 1;
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const int srcExpBias = srcInfExp >> 1;
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const SRC_REP_T srcMinNormal = SRC_REP_T(1) << SRC_SIG_BITS;
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const SRC_REP_T srcInfinity = (SRC_REP_T)srcInfExp << SRC_SIG_BITS;
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const SRC_REP_T srcSignMask = SRC_REP_T(1) << (SRC_SIG_BITS + srcExpBits);
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const SRC_REP_T srcAbsMask = srcSignMask - 1;
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const SRC_REP_T srcQNaN = SRC_REP_T(1) << (SRC_SIG_BITS - 1);
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const SRC_REP_T srcNaNCode = srcQNaN - 1;
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const int dstBits = sizeof(DST_T) * 8;
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const int dstExpBits = dstBits - DST_SIG_BITS - 1;
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const int dstInfExp = (1 << dstExpBits) - 1;
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const int dstExpBias = dstInfExp >> 1;
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const DST_REP_T dstMinNormal = DST_REP_T(1) << DST_SIG_BITS;
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// Break a into a sign and representation of the absolute value
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union SrcExchangeType {
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SRC_T f;
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SRC_REP_T i;
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};
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SrcExchangeType src_rep;
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src_rep.f = a;
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const SRC_REP_T aRep = src_rep.i;
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const SRC_REP_T aAbs = aRep & srcAbsMask;
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const SRC_REP_T sign = aRep & srcSignMask;
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DST_REP_T absResult;
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// If sizeof(SRC_REP_T) < sizeof(int), the subtraction result is promoted
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// to (signed) int. To avoid that, explicitly cast to SRC_REP_T.
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if ((SRC_REP_T)(aAbs - srcMinNormal) < srcInfinity - srcMinNormal) {
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// a is a normal number.
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// Extend to the destination type by shifting the significand and
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// exponent into the proper position and rebiasing the exponent.
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absResult = (DST_REP_T)aAbs << (DST_SIG_BITS - SRC_SIG_BITS);
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absResult += (DST_REP_T)(dstExpBias - srcExpBias) << DST_SIG_BITS;
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}
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else if (aAbs >= srcInfinity) {
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// a is NaN or infinity.
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// Conjure the result by beginning with infinity, then setting the qNaN
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// bit (if needed) and right-aligning the rest of the trailing NaN
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// payload field.
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absResult = (DST_REP_T)dstInfExp << DST_SIG_BITS;
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absResult |= (DST_REP_T)(aAbs & srcQNaN) << (DST_SIG_BITS - SRC_SIG_BITS);
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absResult |= (DST_REP_T)(aAbs & srcNaNCode) << (DST_SIG_BITS - SRC_SIG_BITS);
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} else if (aAbs) {
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// a is denormal.
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// renormalize the significand and clear the leading bit, then insert
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// the correct adjusted exponent in the destination type.
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const int scale = __clz(aAbs) - __clz(srcMinNormal);
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absResult = (DST_REP_T)aAbs << (DST_SIG_BITS - SRC_SIG_BITS + scale);
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absResult ^= dstMinNormal;
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const int resultExponent = dstExpBias - srcExpBias - scale + 1;
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absResult |= (DST_REP_T)resultExponent << DST_SIG_BITS;
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} else {
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// a is zero.
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absResult = 0;
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}
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// Apply the signbit to (DST_T)abs(a).
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const DST_REP_T result = absResult | (DST_REP_T)sign << (dstBits - srcBits);
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union DstExchangeType {
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DST_T f;
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DST_REP_T i;
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};
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DstExchangeType dst_rep;
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dst_rep.i = result;
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return dst_rep.f;
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}
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#endif // COMPILER_RT_BUILTIN_FP16_H_
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